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To: mnispel who wrote (38)5/26/1998 1:08:00 PM
From: mnispel  Respond to of 698
 
Sorry for the delay: Patent #1

I don't understand the E1 (Expired) status on this one. But this one seems to be the least pertinent.

Mark N.


5184317 : Method and apparatus for generating mathematical functions
----------------------------------------------------------------------
INVENTORS: Pickett; Lester C., Mountain View, CA 94041

ASSIGNEES: none
ISSUED: Feb. 2 , 1993 FILED: Jan. 30, 1991
SERIAL NUMBER: 623238 MAINT. STATUS: E1 (Expired)
INTL. CLASS (Ed. 5): G06F 015/32; G06F 007/38;
U.S. CLASS: 364/735; 364/718; 364/748.5;
FIELD OF SEARCH: 364-735,718,748.5,746.2,723 ;


ABSTRACT: A method and apparatus for general-purpose generation of digital mathematical functions in connection with a computer processor enabling computation of such functions as exponential, logarithmic, hyperbolic and trigonometric functions, as well as numerous special-purpose engineering functions. The invention employs compact look-up tables accessed by look-up techniques and value interpolation to determine values not found in the tables. In specific embodiments, specific techniques are employed for table generation and value interpolation to attain results at desired levels of speed, precision, economy, and reliability. Applications include alternatives to conventional hardware multipliers and numerical processors. Individual embodiments may be realized either directly in hardware or in software. Multiple embodiments may be realized as software or hardware function libraries. Coupled multiple embodiments may be realized as general-purpose hardware or software mathematical processors.

EXEMPLARY CLAIM(s): Show all 35 claims

....

FOREIGN APPLICATION PRIORITY DATA: none
FOREIGN REFERENCES: none
OTHER REFERENCES: none
ATTORNEY, AGENT, or FIRM: Brooks & Kushman;
PRIMARY/ASSISTANT EXAMINERS: Nguyen; Long T.;




To: mnispel who wrote (38)5/26/1998 1:13:00 PM
From: mnispel  Respond to of 698
 
Patent #2:

This is a long one. Mark N.

5197024 : Method and apparatus for exponential/logarithmic computation
---------------------------------------------------------------------
INVENTORS: Pickett; Lester C., Mountain View, CA 94041

ASSIGNEES: none
ISSUED: Mar. 23, 1993 FILED: Apr. 3 , 1992
SERIAL NUMBER: 863218 MAINT. STATUS:
INTL. CLASS (Ed. 5): G06F 007/38;
U.S. CLASS: 364/748.5
FIELD OF SEARCH: 364-748.5,748,736,736.5,747 ;


ABSTRACT: A method and apparatus for use in or with a general-purpose computing environment employs particularly efficient exponential and logarithmic function generation in combination with a logarithmic data format, herein called an exponential/logarithmic (E/L) or exponential floating-point (E-FLP) computational system, to attain general-purpose exponential floating-point (E-FLP) numerical processing comparable in effectiveness to conventional floating-point (C-FLP) processing of similiar precision and dynamic range. An E/L (or E-FLP) quantity according to the invention has an exponential floating-point (E-FLP) value that is inferred from its logarithmic fixed-point (L-FXP) representation or "format" value which when employed with exponential and logarithmic transformations according to the invention yields rapid and precise computational results. [Direct combinatorial construction provides increased speed in microprogrammed embodiments and provides pipe-lined operation in embodiments routing operands in close sequence.] E-FLP computations and their associated L-FXP implementations are disclosed, including the elementary transcendental functions (exponential, logarithm, sine, cosine, tangent and their inverses, etc.). E-FLP computations are characterized by fast multiplication-oriented arithmetic and particularly fast logarithms, exponentials, powers and roots.

U.S. REFERENCES: Show the 4 patents that reference this one Patent Inventor Issued Title
3099742 * Bryne et al. 7 /1963
3194951 * Shaefer 7 /1965
3402285 * Wang 9 /1964
3436533 * Moore et al. 4 /1969
4046999 Katsuoka et al. 9 /1977 Logarithmic function generating system
4062014 Rothgordt et al. 12 /1977 Natural binary to logarithmic binary conversion device with means for range selection
4063082 Nussbaumer 12 /1977 Device generating a digital filter and a discrete convolution function therefor
4158889 Monden 6 /1979 Calculator for calculating ax with the base a of any positive number by calculating common logarithm of a
4583180 Kmetz 4 /1986 Floating point/logarithmic conversion system
4720809 Taylor 1 /1988 Hybrid floating point/logarithmic number system arithmetic processor
4727508 Williams 2 /1988 Circuit for adding and/or subtracting numbers in logarithmic representation
4747067 Jagodnik, Jr. et al. 5 /1988 Apparatus and method for approximating the magnitude of a complex number
4823301 Knierim 4 /1989 Method and circuit for computing reciprocals
4839846 Hirose et al. 6 /1989 Apparatus for performing floating point arithmetic operations and rounding the result thereof
* some details unavailable

EXEMPLARY CLAIM(s): Show all 27 claims

What is claimed is:
1. In a number processor for processing exponential floating point (E-FLP) numbers wherein a representation of a represented E-FLP number comprises an exponent signal comprising a logarithmic function of said represented E-FLP number, apparatus for extracting a portion of an input E-FLP operand, which is related to a ratio of integers, to produce an E-FLP output, comprising: means coupled to receive an input exponent signal comprising said logarithmic function of a magnitude of said input E-FLP operand for routing in accordance with a partitioning between a first characteristic signal and a first mantissa signal;

exponential function signal generator coupled to receive said first mantissa signal to produce a first significand signal comprising an exponential function, corresponding to said logarithmic function, of said first mantissa signal;
means comprising combinatorial logic coupled to receive a most significant portion of said input exponent signal and said first significant signal for selectively altering digits of said first significand signal to produce a first interim signal;
logarithmic function signal generator coupled to receive said first interim signal to produce a second interim signal comprising said logarithmic function of said first interim signal; and
means coupled to receive said first characteristic signal and said second interim signal for adding to produce an output exponent signal comprising said logarithmic function of a magnitude of said E-FLP output and thus to produce said E-FLP output.

RELATED U.S. APPLICATIONS: Patent No. Appl No. Issue Date
598185
366080

This is a continuation of co-pending application Ser. No. 598,185 filed on Oct. 12, 1990, now abandoned, which is a continuation of U.S. Ser. No. 366,080 filed Jun. 14, 1989, now abandoned.

FOREIGN APPLICATION PRIORITY DATA: none

FOREIGN REFERENCES: Document No. Country Date Intl. Class
56-68834 Japan 6 /1981

OTHER REFERENCES:

Combet et al., "Computation of the Base Two Logarithm of Binary Numbers", IEEE Transactions on Electronic Computers, pp. 863-867, 1965.

Swartzlander, Jr. et al., "The Sign/Logarithm Number System", IEEE Transactions on Computers, pp. 1238-1242, 1978 (Dec.).

Lee et al., "The Focus Number System", IEEE Transactions on Computers, pp. 1167-1170, Nov. 1970.

Edgar et al., "Focus Micro-Computer Number System", Communications of the ACM, vol. 22, No. 3, Mar. 1979, pp. 166-177.

Lo et al., "A Hardwired Generalized Algorithm for Generating the Logarithm Base-K by Iteration", IEEE Transactions on Computers, vol. 36, No. 11, Nov. 1987, pp. 1363-1367.

N. G. Kingsbury and P. J. W. Rayner, "Digital Filtering Using Logarithmic Arithmetic", Electronic Letters, Jan. 28, 1971, 56-58.

"Integrated-Circuit Logarithmic Arithmetic Units", IEEE Computer Transactions, May 1985, 475-483, J. H. Lang et al.

"A 20-Bit Logarithmic Number Processor", IEEE Computer Transactions, Feb., 1988, 190-200, F. J. Taylor et al.

T. Stouraitis and F. J. Taylor, "Analysis of Logarithmic Number System Processors", Transactions on Circuits and Systems, May, 1988, 519-527.

"A Simple but Realistic Model of Floating-Point Computation", W. S. Brown, ACM Transactions on Mathematical Software, vol. 7, No. 4, Dec., 1981.

"Handbook of Mathemical Functions with Formulas, Graphs, and Mathematical Tables", Edited by Milton Abramowitz and Irene A. Stegun, National Bureau of Standards Applied Mathematics Series 55, Issued Jun., 1964.

"The Implementation of Logarithmic Arithmetic", by A. Bechtosheim and T. Gross, Computer Systems Laboratory, Stanford University Dec. 1, 1980.

"A Parallel Search Table for Logarithmic Arithmetic", by A. Bechtosheim and T. Gross, Computer Systems Laboratory, Stanford University, Mar. 15, 1980.

"Redundant Logarithmic Arithmetic", IEEE Transactions on Computer, vol. 39, No. 8, Aug. 1990, 1077-1086, by M. G. Arnold, T. A. Bailey, J. R. Cowles and J. J. Cupal.

"Extending the Precision of the Sign Logarithm Number System" (M. S. Thesis) M. G. Arnold, University of Wyoming, Laramie, Wyoming, Jul. 1982.

"A Class of Algorithms for Automatic Evaluation of Certain Elementary Functions in a Binary Computer", Thesis by Bruce Gene DeLugish, 1970 (pp. 49-56; 7-15; 25-37).

The TTL Data Book vol. 2, 1985, Texas Instruments, pp. 3-357/366, 3-377/383, 3-577/581, 3-709/720, 3-851/855, 3-857/861, 3-895/898, 3-917/921 and 3-922/925.

1956 edition of Webster's New Collegiate Dictionary by G. & C. Merriam Co., pp. 22, 529, 575, 672-673 and 787.

1983 edition of Webster's New Universal Unabridged Dictionary by Simon & Shuster, pp. 45, 1134, 1227-1228, 1434 and 1688.

"A 10-ns Hybrid Number System Data Execution Unit for Digital Signal Processing Systems", IEEE Journal of Solid-State Circuits, vol. 26, Bi, 4, Apr. 1991, pp. 590-599, by F. Lai.

IBM Research Report RC 14521 (#64941), Mar. 22, 1989 entitled "A Hybrid Number System Processor with Geometric and Complex Arithmetic Capabilities", by F. Lai et al.

Article entitled "Uncalculated Art", Science, May 24, 1991, p. 1185.
ATTORNEY, AGENT, or FIRM: Brooks & Kushman;
PRIMARY/ASSISTANT EXAMINERS: Nguyen; Long T.;




To: mnispel who wrote (38)5/26/1998 1:17:00 PM
From: mnispel  Read Replies (1) | Respond to of 698
 
Patent #3

5359551 : High speed logarithmic function generating apparatus
----------------------------------------------------------------------
INVENTORS: Pickett; Lester C., Mountain View, CA

ASSIGNEES: Log Point Technologies, Inc., Mountain View, CA
ISSUED: Oct. 25, 1994 FILED: Jan. 6 , 1993
SERIAL NUMBER: 000963 MAINT. STATUS:
INTL. CLASS (Ed. 5): G06F 001/02;
U.S. CLASS: 364/718
FIELD OF SEARCH: 364-718,722,735,748.5,750,771,753 ;


ABSTRACT: Apparatus for high speed generation of digital exponential functions in connection with a computer processor. The invention employs compact look-up tables accessed by look-up techniques and value interpolation to determine values not found in the tables. In specific embodiments, specific techniques are employed for table generation and value interpolation to attain results at desired levels of speed, precision, economy and reliability. Applications include alternatives to conventional hardware multipliers and numerical processors. Individual embodiments may be realized either directly in hardware or software. Multiple embodiments may be realized as software or hardware function libraries. Coupled multiple embodiments may be realized as general purpose hardware or software mathematical processors.

U.S. REFERENCES: Show the 3 patents that reference this one Patent Inventor Issued Title
3036774 * Brinkerhoff 5 /1962
3099742 * Byrne 7 /1963
3194951 * Schaefer 7 /1965
3402285 * Wang 9 /1968
3436533 * Moore et al. 11 /1965
4046999 Katsuoka et al. 9 /1977 Logarithmic function generating system
4062014 Rothgordt et al. 12 /1977 Natural binary to logarithmic binary conversion device with means for range selection
4077063 Lind 2 /1978 Apparatus for rapidly determining the trigonometric functions of an input angle
4078250 Windsor et al. 3 /1978 Log-antilog conversion for a digital radar system
4158889 Monden 6 /1979 Calculator for calculating ax with the base a of any positive number by calculating common logarithm of a
4164022 Rattlingourd et al. 8 /1979 Electronic digital arctangent computational apparatus
4225933 Monden 9 /1980 Exponential function computing apparatus
* some details unavailable

EXEMPLARY CLAIM(s): Show all 13 claims

I claim:
.... (only for math heads - Mark N.)

REFERENCE TO RELATED APPLICATIONS

The present patent application is a divisional continuation of the patent application Ser. No. 07/623,238 filed Jan. 30, 1991 now U.S. Pat. No. 5,184,317, in the name of the present inventor and entitled "Method and Apparatus for Generating Mathematical Functions." Application Ser. No. 07/623,238 is a continuation of the patent application Ser. No. 07/366,376 filed Jun. 14, 1989 (now abandoned) in the name of the present inventor and also entitled "Method and Apparatus for Generating Mathematical Functions."
Reference is also made to the patent application Ser. No. 07/598,185 filed Oct. 12, 1990 in the name of the present inventor and entitled "Method and Apparatus for Exponential/Logarithmic Computation." Application Ser. No. 07/598,185 is a continuation of the application Ser. No. 07/366,080 (now abandoned) filed Jun. 14, 1989 (concurrently with the application Ser. No. 07/366,376) in the name of the present inventor and entitled "Method and Apparatus for Exponential/Logarithmic Computation."
Application Ser. No. 07/598,185 addresses the generation of fixed-point functions of generally wide range possessing derivatives of generally unrestricted magnitude with the generated functions corresponding to an implementation of general purpose floating-point operations and functions.
The present invention addresses the generation of restricted-range fixed-point mathematical functions possessing derivatives of restricted magnitude.