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To: Ali Chen who wrote (6385)5/29/1998 3:13:00 PM
From: Time Traveler  Read Replies (1) | Respond to of 6843
 
Ali, apparently you have never laid out any integrated circuits (IC) or any printed circuit boards (PCB). For your information, the rule of thumb is:

- The more transistors you add to the IC, the less dense it has to be due to added complexity in the wiring (metal layers).

- The more components you add to the PCB, the less dense it has to be due to added complexity in the wiring (traces).

Given K6's (0.25um) density of 8.8M / 68 mm^2 = 0.129M / mm^2 and K6-2's density of 9.3M / 81 mm^2 = 0.115 mm^2, there is an 11% in transistor density reduction going from K6 to K6-2 but the metal wiring density would easily go up by that much due to such extreme complexity of processor.

Time Traveler personally does not believe K6 and K6-2 cores are any different. The aggressiveness in design rules thus still applies to the core of K6-2. Perhaps, AMD learned a lesson by utilizing a more conservative design rule for the 3D add-on.

Time Traveler



To: Ali Chen who wrote (6385)6/1/1998 3:09:00 AM
From: Paul Engel  Respond to of 6843
 
Ali - Re: "This is a 12.7% increase in area per transistor"

Thanks, ALi - I dropped a decimal point.

I'm sure this larger die must REALLY YIELD better than the smaller die since as of today you realize AMD DID HAVE A LAYOUT PROBLEM!

We'll see massive profits this quarter for AMD - won't we - due to these massive yields?

Paul