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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Ibexx who wrote (4380)	5/29/1998 10:54:00 PM
From: Gary Wisdom	Read Replies (1) \| Respond to of 93625

All I know is . . . Intel trading will be very predictable on Monday. It'll trade +/- 1/2 point from the opening price. As for Rambus, who the hell knows? You can't predict a damned thing with this stock. I certainly won't be buying on Monday. And, I almost definitely won't be selling any. This Intel news is already priced in Rambus. It didn't tank at the close (went down a little on almost no volume) and it didn't trade down in the aftermarket. The stock was being punished precisely on this Intel assorted news for the last 9 days. It's just that the little guy wasn't made privy to it. However, that certainly won't prevent the market makers and motivated hedge fund managers from screwing the hell out of anyone that thinks they're smart enough to trade it on Monday. One thing for sure: I sure don't see a $17 point up day anytime soon. This Intel BS sure seems to have put the trading range on this stock between $35 and $45 for the balance of the year. Of course, there's always the possibility that these are not set in stone. Face it. If your stock has anything to do with semis, you're screwed. Maybe it's time to put your money in AT&T and take your 7% annual gain. At least you'll have your hair left in the end.

To: Ibexx who wrote (4380)	5/30/1998 8:33:00 AM
From: REH	Read Replies (3) \| Respond to of 93625

Looking at tomshardware.com is seems pretty clear that the road map is Katmai/Camino (Q1/Q2 99) --> Carmel/Tanner (Q2 99) --> Merced (Q1 2000). Is this wrong? Does Intel have a different road map? "All chipsets above the 440LX will run at 100 MHz front side bus or higher. It seems likely that Carmel as well as Camino will run at 133 MHz FSB to take advantage of direct RDRAM and 4x AGP." The delay of Merced really should have no effect on the deployment of Direct RDRAM as we should expect all CPU's starting with Katmai to be based on Direct RDRAM. I expect to see motherboards this year with both RIMM and RDRAM-sockets based upon the advancement of the Rambus-licencees. Q3 could prove to be much better than estimates based upon the fact that royalty income from chip-vendors delivering to Graphic Board manufacturers and Nitendo chip sales increase. In addition we have the upside potential from allocation of deferred revenue. This could all mean that Operating Income for Q3 would be somewhere between $ 3-4M. Please correct me if you feel differently. The somewhat bearish trend in semi's actually make me more bullish <bp are you with me?> reh/long

To: Ibexx who wrote (4380)	5/30/1998 6:20:00 PM
From: Estephen	Respond to of 93625

Re. Merced is a generation above (so to speak) the katmai set. Isn't katmai a 32 bit processor? thanks in advance. "I am afraid you got the order reversed". Ibex, This is the understanding that I have and I am sure it is correct from the infomation available. Katmia is the Processor due in the first or second quarter of 1999. It is support by caimo (rambus) chip set and is design for PC application. It is the first step to drive rambus into the main pc memory. Always has been. Merced is scheduled for 2nd half (now year 2000) and is for high end work stations and servers. as long as the schedule for katmia has not changed. Rambus is on track. I say buy or hold. Is katmai 32 bit? "The successor of the Pentium II at 100 MHz FSB will be Katmai, starting to ship in Q1/99, initially at 450 MHz, then soon moving to 500 MHz. Katmai will have the new MMX2 instruction set, which includes double precision floating point SIMD (single instruction multiple data) instructions. This new instruction set will accelerate 3D graphics by a significant amount, being superior to AMD's single precision SIMD instructions used in the upcoming K6-2. Tanner will be some kind of IA32 Merced, succeeding the Pentium II Xeon Slot 2 CPU, but mopst likely keeping its name. Tanner will include the new MMX2 instruction set of Katmai and will probably start off with 450 or 500 Mhz clock speed. Merced is supposed to launch in the second half of next year, using a new slot called 'Slot M'. A few Merced IA64 tidbits are its 'explicit parallelism', which results in several parallel machine codes after compilation of the source code. This baby runs under the name 'EPIC' for 'explicit parallel instruction computing'. Merced will offer 128 integer and 128 floating point registers and multiple integer and floating point units, which can all work in parallel. Intel calls this 'massive hardware resources'. IA32 is only capable of 'implicit' parallelism, resulting in one machine code after compilation. IA32 offers only 8-32 integer and 8-32 floating point registers and has only got 'few' integer and floating point units, if I'm not mistaken 'few' is an actual 'two'."