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Technology Stocks : Semi-Equips - Buy when BLOOD is running in the streets! -- Ignore unavailable to you. Want to Upgrade?

To: SemiBull who wrote (5686)	6/9/1998 2:00:00 AM
From: Katherine Derbyshire	Read Replies (3) \| Respond to of 10921

>> <<Regarding Semitool, I don't know enough about either system to judge the relative merits, but you certainly can't ignore them. They certainly have substantial R&D experience, and may also have at least a beta production tool.>> I think they have more than a beta tool to date, though I guess its still beta until true full blown production begins. << Correct. It's much simpler to get a chipmaker to take a tool on evaluation than it is to get them to actually risk product in it. >>I believe MOTO and AMD are as well. I believe MOTO's Hector Ruiz made that statement the week following IBM's announcement, and I've heard the same from AMD. I believe in both cases SMTL and NVLS are involved though its unclear how with the Damascus announcement. I beleive SMTL's ECD is deemed superior to NVLS (hence the buyout attempt last year) which may be why both are involved....or so I hope.<< I saw the Motorola announcement after I sent my earlier note. Still, until someone saws a commercial Motorola (or IBM, or AMD) chip in half and sees copper wiring, none of this is definite. Motorola claims to have a copper CMOS process in 4Q98. IBM claims to have one for foundry customers in 3Q98, and claims to have copper production of its own chips now. Meanwhile, in one of the worst years for equipment sales in the last decade, no one is crowing about copper production buys, even by "major semiconductor manufacturers." Very curious... >>I guess the theory behind this, and please correct me if I'm wrong or this sounds illogical but as it was proposed to me is the that one supplier supplies the barrier layer tool, and the other supplies the seed layer tool.<< Close, but not quite. SMTL is a fill layer supplier. NVLS was a barrier and seed layer supplier, and this most recent announcement adds a fill tool to the repertoire. >>Technical issues aside, I believe the domestic DRAM players (there are only two) have been looking at Cu. I'm not sure how that plays into what the Japanese are doing, but from a practical standpoint why spend all that research on developing an aluminum damascene process when most of the bugs have been worked out w/respect to Cu. Am I missing somthing here, or is this much like the Japanese insistance on employing SOG in place of CMP. The lowest cost mfg of DRAM in the world started using CMP way way back when few knew or could appreciate its advantages - lowering cost and improving yield. As Cu will improve yield b/c of aluminum's disadvantages, why buck the trend with respect to DRAM? << I'm not quite sure I understand the Japanese thinking either, but I can make some guesses. The switch to copper is a radical change requiring substantial retooling. Remember that copper is poison to transistors, and electroplating is inherently messy. No one makes such a change lightly. I suspect the Japanese DRAM companies, already reeling under the price crunch, are reluctant to take that kind of risk unless performance clearly justifies it. They appear to believe that, for DRAMs, the performance advantages are insufficient, and the cost advantages don't balance the development cost, at least for the short term. Katherine