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To: Paul Engel who wrote (57419)	6/7/1998 8:14:00 AM
From: gnuman	Read Replies (1) \| Respond to of 186894

Paul E. re: "New Intel Roadmap" Yes, I saw that and posted it here a month ago. Great calculation, though. ;-) Let's just agree the article got half of Mendocino right and leave it at that.

To: Paul Engel who wrote (57419)	6/7/1998 5:43:00 PM
From: andy kelly	Read Replies (1) \| Respond to of 186894

Paul Re: <<By the way - my confidential sources tell me that the Mendocino may be going into production on First Silicon - A0 stepping.>> Can you tell me what this means? TIA---andy

To: Paul Engel who wrote (57419)	6/8/1998 12:09:00 PM
From: Tony Viola	Read Replies (1) \| Respond to of 186894

Paul, Re: "The new ROADMAP shows the 333 MHz Mendocino to be Officially Introduced September 13, 1998." I asked Paul Otellini after the stockholders' meeting, which was, as you know, May 20th, when introduction of Mendocino would be. He said 4Q98. So, Mendocino intro of 9/13, which Intel could still beat (or slip, or stay the same) is at least a month early compared to 3 weeks ago. I said to Paul that I thought Mendocino was important to stop the snickering, etc. going on about Celery, etc., that Intel needed a full-strength Celeron. He agreed, although he said that the first Celeron, @ 266 MHz and no L2 cache was ~ 10% faster than PMMX 233. He said that was the goal. I said OK, and all the ridicule about no L2 cache was pure BS...even mainframes did not have L2 cache until about four years ago. He got a laugh out of that. What's AMD got to compete with Mendocino for the Christmas season? Tony