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Technology Stocks : IDTI - an IC Play on Growth Markets -- Ignore unavailable to you. Want to Upgrade?

To: Suhail Nanji who wrote (8788)	6/8/1998 11:33:00 AM
From: Harold Engstrom	Read Replies (1) \| Respond to of 11555

Does anyone have access to a list of the institutional owners of IDTI stock, how much they own and their phonenumbers? Thanks, Harold

To: Suhail Nanji who wrote (8788)	6/8/1998 12:06:00 PM
From: Rob S.	Respond to of 11555

It looks like IDT'S WC 2 will be similar to the Celeron chip with integrated cache. the WC 2 will have a large L1 cache and,hopefully, will be available at 300 Mhz and 33 Mhz clock speeds. Glen Henry decided on a large L1 v. an on-chip L2 because the performance gains were similar without some of the complications. Intel is moving very aggressively to maintain the PC market. It will be interesting to see how the FTC lawsuit is phrased - whether they go after the broad issue of Intel's co-opting of the bus standards. Is it reasonable for Intel to make the bus structure proprietary? Isn't this sort of standard something that should be open? It is common for this sort of industry pervasive technology to evolve as a common standard or under the stewardship of IEEE. Intel is being one bad-ass pimp on this issue and the FEDS should wring their necks for trying to divert the market away from open standards, IMO.

To: Suhail Nanji who wrote (8788)	6/8/1998 8:20:00 PM
From: SemiBull	Respond to of 11555

IDTI's 32-bit core borrows functions from 64-bit cousin By Anthony Cataldo SANTA CLARA, Calif. - Integrated Device Technology Inc. (IDT) has introduced a 32-bit processor core that it says will provide many of the functions that have only been available on a 64-bit RISC processor. The company has developed a standalone processor based on the core, but has crafted it to be combined with other functions on one device. In simplest terms, the RISCore32300 is a stripped-down version of IDT's 64-bit MIPS-based devices, and is architecturally compatible with the instruction sets of the company's RC4000 and RC5000 64-bit processors. The company, however, found that customers wanted many of the advantages of 64-bit processing without paying a premium. "One of the consequences of having introduced 64-bit architectures is that all the innovation has occurred with 64-bit processing," said Phil Bourekas, director of marketing at the microprocessor division of IDT (Santa Clara, Calif.). "64-bit is very good for IDT, but there's a number of customers who utilized it not because it was 64-bit but because of the other attributes, such as the DSP capability." The core, which is the basis of the first RC32364 chip, has multiply-accumulate and multiply-subtract functions to perform real-time digital signal processing for consumer and communications applications. "There's enough performance in that you can integrate this in a Web browser, and we can do a 56-k modem with 20 percent of the processor's performance," Bourekas said. "And in a remote-access router, instead of using a 68000 and DSP chip, we get rid of the DSP and do bit insertion/extraction in software, and we still have enough bandwidth to do local routing on the LAN." Aside from enhanced DSP capabilities, the RC32300 family borrows several architectural features from IDT's 64-bit processors. One of those is the cache unit, which has been designed to provide 1 Gbyte/second data feeds to the processor engine. The cache unit is divided into 8 kbytes of instruction and 2 kbytes of two-way associative data cache, and supports a number of features to speed data transfers such as write-through and write-back functions, per-line locking, and non-blocking mode. Another feature taken from the 64-bit 4000 architecture is the memory management unit (MMU), which includes a 32-page translation look-aside buffer (TLB) for real-time operating systems in need of multitasking, such as Windows CE, Bourekas said. The device also is equipped with a configurable bus-interface unit that can be programmed to run at different speeds from the core, and that provides a link to other cores that the company plans to make available. It can be programmed to connect to 8-, 16- and 32-bit external devices, and can operate as low as one-eighth the bus core speed. Both big-endian and little-endian byte-ordering conventions are supported. Also included is a JTAG interface that, aside from providing a means for boundary scan during board manufacturing, enables in-circuit emulation. "As we do integrated products around this, we won't have to retool the circuit emulator, and neither will our customers," Bourekas said. Performs 175 Mips Based on a 0.3-micron, three-layer metal CMOS process, the RC32364 can execute 175 Mips and 67 million MACs/second running at 133 MHz, giving the chip an aggregate bandwidth of 1.3 Gbytes/second. The chip is a relatively small 29 square millimeters and consumes about 850 milliwatts (typical) at 133 MHz. IDT has been sampling since April. It will begin selling the device in volume by the third quarter of this year. The 100-MHz version costs $12.50 while the 133-MHz device is $16.60, based on 10,000-piece quantities.