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To: Joe NYC who wrote (27557)6/19/1998 6:49:00 PM
From: Scumbria  Respond to of 33344
 
Joe,

The fastest drams I have seen have an access time of 25ns for a page hit and about 100ns on a page miss. Compare to 10ns access for the Mendocino cache.

There are situations where sdram or cache accesses can be pipelined. A well designed memory or cache controller will optimize for this. Pipelined L2 accesses can complete in 3ns (at 333 MHz core clock) and pipelined sdram accesses can complete in 10ns at (100 MHz dram clock.)

Scumbria


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