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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Maxwell who wrote (33486)	6/22/1998 12:31:00 AM
From: Paul Engel	Read Replies (1) \| Respond to of 1572940

Maxwell - Re: "I thought they would ship more than 10M PII/C this quarter. Are they limited by silicon, cartridge, SRAM, packaging, or demand?" Intel may ship more than 10 million this quarter. Limitations are due to their conversion rate from Pentium MMX. Pentium MMX (0,35 micron) wafer starts have ended and have been replaced with Pentium II 0.25 micron starts. Re: "Have they completely ramped in their bump process?" Intel continues to use both "bumps" and wire bonds, depending on the package options. Re: "Have they reduced their PII 131mm^2 die size by eliminating the bonding pad? If so what is the new die size now? " Bond pads have not yet been eliminated. Intel is doing a 0.18 micron Coppermine - due out by mid 1999. Look for it to be less than 131 sq. mm. Re: "How come Intel couldn't get their SRAM running at same CPU speed when the PII was released? Was it because fast SRAM didn't exist at that time?" The Slot 2 took a lot of coordination from a packaging and assembly and test standpoint. Further, the SLot 2 uses one of two new chip sets - the 440GX or the 450 NX. The availability of these chip sets was also "in the critical path" for the Slot 2/full speed L2 cache program. The SRAM is a bit of no-brainer since it is currently made on the older 0.35 micron process. Paul