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Pastimes : Dream Machine ( Build your own PC ) -- Ignore unavailable to you. Want to Upgrade?

To: Spots who wrote (1511)	6/23/1998 6:35:00 PM
From: Sean W. Smith	Respond to of 14778

Spots, glad you gonna be there. I really don't want to offend anyone here. Anyway you, me, Bill Reidleman, David Coburn, and Jeff Grover can have a battle royale. we'll probably scare the rest away. :) Anyway, TAOTL will be excellent experience. conference in new jersey was an excellent one. We have some very sharp TA minds in our group including more than a few full time traders, a couple of pros, and mutual fund manager or two... I will be presenting the only NON TA presentation on maximing your use of windows. Most of our traders need some help in this area. Word from chan this AM was that we are currently at 80 people which is right where we want to be... Sean

To: Spots who wrote (1511)	6/23/1998 6:57:00 PM
From: Sean W. Smith	Respond to of 14778

I'll show you my assembler-language uppercut <ggg>. speaking of assembler, was sitting here this afternoon writing some, bringing back memories of my days cracking software on the apple II in 6502 assembler. funny though, many years later, the code looks extrememly similar although its for an ARM7TDMI 32 bit RISC vs. an 8bit 6502 machine. Time change, yet times stay the same.... Nostaligic Snippet below: ; *************************************** ; Load/Store Section of Code ; *************************************** ld_out_of_reset LDR r14,=0x00800000 ; Address for initialization params LDR r13,=0x00000000 ; Zero value LDR r0,[r14] ; Init # of cycle count ADD r14,r14,#4 ; LDR r2,[r14] ; Init start address ADD r14,r14,#4 ; LDR r1,[r14] ; Init LDR/STR block size LDR r14,=0x000000ff ; byte mask LDR r3,=0x3 CMP r1,r3 BEQ pf_init3 LDR r3,=0x4 CMP r1,r3 BEQ bw_start4 LDR r3,=0x5 CMP r1,r3 BEQ la_init5 ld_init2 ADD r3,r2,#4 ; ld_wrloop2 STR r2,[r2] ; Store data to address STR r3,[r3] ; Store data to address ld_rdloop2 LDR r6,[r2] ; LDR r7,[r3] ; CMP r6,r2 ; BNE ld_exception ; CMP r7,r3 ; BNE ld_exception ; ADD r2,r3,#4 ; ADD r3,r2,#4 ; ADD r13,r13,#1 ; CMP r13,r0 ; BNE pf_wrloop2 ; Sean