Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Elmer who wrote (33956)	7/6/1998 12:06:00 PM
From: Maxwell	Respond to of 1573044

Elmer: <<No, it isn't and you clearly don't get the point. The large L2 greatly reduces bus traffic which allows a quad system to achieve much greater throughput than a Pentium II system would achieve. >> Show me the benchmark. In theory it is true. In real life it may be hardly noticeable. <<That's also why the split-transaction bus design is so much more efficient that Socket7 in MPU designs.>> Efficient? Why does socket 7 can blast mutant aliens faster than PII clock for clock? Bus of PII must be pretty clogged up when they are calculating those 3D FP. Maxwell