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To: Paul Engel who wrote (27995)	7/7/1998 6:29:00 PM
From: Scumbria	Read Replies (1) \| Respond to of 33344

The fundamental difference - and one that limits x86 speed - is the INSTRUCTION LENGTH. Paul, Instruction length is a problem with x86. In a super-pipelined design, you could take one clock to strip of mod-rm and prefix bytes, a second clock to calculate instruction length, and a third clock to decode the instruction. Intel already takes two clocks for decode. As long as you can break a complex task into simpler pipelined tasks, (as you can with instruction decode,) you should be able to implement a screaming fast x86 processor. Despite that complexity, Intel has managed to implement newer x86 processors that are so fast that there are very few RISC processors that can match it in clock speed and integer performance. I guess this means you agree with me ;^) Scumbria