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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: KM who wrote (5549)	7/9/1998 11:38:00 AM
From: TigerPaw	Read Replies (2) \| Respond to of 93625

First Post! I have studied Rambus and I will try to explain why their design is faster than DRAM. In DRAM memory, in order to read or write values the processor must push electrons into the address lines. The address traces charge up like tiny capacitors eventually building up inside the transistors of the DRAM address decode and activate the gates. Then, to read, the DRAM must push electrons into data lines, charging them and activating the buffer transistors back in the processor. Before the action can be repeated these electrons must be allowed to bleed out to the ground circuits. Electrons are fast so this process can be repeated 100 million times a second. With rambus the processor charges up a few lines once and then keeps a standing radio wave bouncing between the end-points of the circular circuit. When it wants to read, it modulates the radio wave with the address, one bit at a time. This is detected by the rambus interface to the DRAM circuit and stored. Once the address has been sent the rambus begins modulating the same radio wave with the data, one bit at a time. It even uses the impedance mismatch of an unterminated line to cause the wave to bounce back on itself and increase the gain of the circuit at the detection point. The lines are both address and data and do not need to have any excess electrons drained off before the next operation. The bits just keep traveling around a loop to the detector. Other technologies try to overlap address and data timing or use both edges of the clock signal but they all still have to fight the capacitance in the lines and dispose of that capacitance at the end of the operation.