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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Elmer who wrote (34969)	7/22/1998 2:17:00 AM
From: Ali Chen	Respond to of 1573305

Elmer <I have seen benchmarks showing ~6% integer improvement and 15-18% FPU> It simply means that the L2 miss rate is enormous in your benchmarks, your benchmark was designed by illiterate idiots, and your benchmarks just do not represent the majority of user's workloads. Remember "up to 6X improvement when using MMX"? Where is it? Same place. The major user workload is determined by market. The market-derived workload is implemented in Z-Davis Winstone or BAPCO system-level benchmarks, and these workloads have 2-3% cache miss rate, and this easily explains 1-2% improvement due to shift from 66 to 100 Mhz bus. Anyone can find (or design) a benchmark that will prove any point, but they would represent a zero in the workload space. Therefore only market-derived benchmarks are meaningful to compare and talk about. <Ali is simply wrong> - He-he-he.. who is questioning?

To: Elmer who wrote (34969)	7/22/1998 7:44:00 AM
From: Michael DaKota	Read Replies (1) \| Respond to of 1573305

"15-18%" - Even a Celeron did not achieve those values. That would probably a celeron, and if it would be, the numbers are Way to high. Give me some links, information. Statements like "however I am bound by nondisclosure from revealing the source " are nonsense. Everyone can claim thing like this . Prove it. All benchmarks I know of show MAX 3-4 % increase on a pII with 66 vs 100 MHz busclock. Celeron benefits more, because it has no 2ndary cache, and improved to 10-12% on certain applications.