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Technology Stocks : CYRIX / NSM -- Ignore unavailable to you. Want to Upgrade?

To: AB who wrote (28716)	8/6/1998 10:30:00 PM
From: FJB	Respond to of 33344

Thanks Anthony. Some good stuff in there. Bob

To: AB who wrote (28716)	8/6/1998 10:31:00 PM
From: Steve Porter	Read Replies (1) \| Respond to of 33344

Anthony, I suspect that the Jalapeno core will have a triple floating point unit.. Call it a hunch ;-) This should also be a good sign that Cayanne is almost in product as Cyrix is moving their attention down the line. Boy I can't wait for this year's microprocessor forum. .... (sorry folks, I read on into the article and.. )HOLY $HIT.. what the FCK is this: But Intel has thoughtfully opened a fourth alternative for the company, according to Swearingen. "With the advent of Socket-370, everything changes. Here is an interface that is inexpensive and implementable. And because it uses GTL-type levels, it can go 133 MHz or more - much faster than Intel is pushing it. We are actively looking at that." Taking 370 and stuffing it to Intel... it almost looks like Cyrix is willing to go with a STANDALONE PROCESSOR!!!!!!!!!!!.. Not only integrated!!!!! Anyone else confused? DOUBLE HOLY $HIT: "In fact, we are seeing speeds from National's CMOS-8 process in South Portland, Maine, that are right on top of what we were seeing from IBM's CMOS-6S-2," Swearingen said. "And we have parts in hand from a 0.18-micron process that is in development."* I smell a freight train.. may have given up on this puppy a little too earlier. It could be toliet trained.. just took a bit longer!!!!!!! Steve Going LONG...

To: AB who wrote (28716)	8/6/1998 10:35:00 PM
From: Investor A	Read Replies (2) \| Respond to of 33344

We are aiming Jalapeno at the 600-MHz Pentium-II performance level," said Cyrix vice president of engineering Mark Bluhm. "That will be much faster than any estimates we have seen of Merced speed on IA-32 code, and it should be competitive with Intel's IA-32 high end at the time." eet.com Is Jalapeno the M3 that we have been awaiting for? If Jalapeno could perform "only" up to PII-600, then, it won't be able to compete with K7-1GHz on 333Mhz bus SLOT A in performance when both arrive. It does not sound good to me. :(( Fuchi ... who loves Cyrix's innovations Please support the PC industry & protect consumer interest techstocks.com users.aol.com

To: AB who wrote (28716)	8/7/1998 12:41:00 AM
From: Pravin Kamdar	Read Replies (1) \| Respond to of 33344

Anthony, Great find. I found this most interesting (as Steve also pointed out): But Intel has thoughtfully opened a fourth alternative for the company, according to Swearingen. "With the advent of Socket-370, everything changes. Here is an interface that is inexpensive and implementable. And because it uses GTL-type levels, it can go 133 MHz or more - much faster than Intel is pushing it. We are actively looking at that." Intel doesn't want to push the core clock speed or the bus frequency too high on their 370 based Celerons because it would challenge the performance of their bread and butter PII. Well, along comes Cyrix and says, "thank you very much." They've been handed a low cost Intel compatible socket that removes some of the socket 7 performance constraints -- while at the same time not having the limitation of having to limit the socket's performance. This could back fire on Intel big time. As for the Jalepeno not being able to compete with a 1Ghz K7, this may be true, but Cyrix will definitely capture the low end. Without copper, low k dielectrics, and perhaps SOI, I don't see how NSM gets to 1Ghz without going to 0.13u. On another point, I believe that performance sells. The problem is that the MII lacks performance in an important area. Who would look at Cristy Brinkley if she were missing a leg? PR rating, or no PR rating... it just doesn't matter. Performance matters. The PC rags will sort out the rest. Finally, is anyone else getting worried that NSM is falling behind in the process war? How is NSM going to get copper and SOI at an affordable development expense? IBM already has them. AMD will get them from MOT. Intel can afford to throw enough money at any problem they need to solve. Perhaps NSM can license the new data flow architecture of the Jalepeno to IBM in exchange for process technology. Pravin.