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To: Michael Sphar who wrote (6574)	8/10/1998 6:11:00 PM
From: spiny norman	Respond to of 10921

MS, Re >>I fail to see how you derive economic factors from Moore's Law which >>only deals with transistor density over time. I believe that if you physically can't shrink/pack the transistors you can't reliably and/or economically engineer more complex systems on a chip. Higher clock speeds, lower current/heat dissipation, better yield, etc. are to a large extent a function of the (smaller) sizes of the structures on the chip. To that extent Moore's law is the physical underpinning of the continuing innovation that you talk about. I agree with most everything else you've said, although when you look at manufacturing costs, I get the impression that you are thinking about your costs in wafers. If you look at prices in terms of gates or ram cells, I think the relationship between shrinking feature sizes and declining costs stands out a little better. Regards