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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: Paul Engel who wrote (62870)	8/20/1998 1:00:00 PM
From: IanBruce	Read Replies (3) \| Respond to of 186894

WHAT PATENTS ARE your talking about? What Exponential patent is violated by the Merced Design? You just keep blowing the same hot air baloney. Paul, I've conceded that bipolar aspects alluded to Merced in the C-Net report were indeed a Red Herring (apologies to Tony Perkins). And I've taken some deserved lumps over this for not being more through -- To answer your question, at issue are the pre-existing patents filed by Exponential (and granted by the U.S Patent Office), covering low-level emulation code for processing X86 instructions. And more specifically, a way to send both X86 and RISC instructions down a single pipe -- employing a shared register for both X86 and RISC instructions. Sound familiar? It should. I suspect that you were already aware of this information -- finding it much simpler to attack me, while failing to provide anything of substance related to the central issue. Of course, it doesn't alter the fact that Intel could face a serious legal battle over the rights to deploy dual-mode IA-64 architecture. And now that we all know exactly what we're talking about, perhaps we can move on. While pursuing other avenues of research into this (thanks for all the prodding), I came across more reports which appear to further substantiate the question of "prior art", and potential problems for Intel's Merced deployment plans. Allow me to share them with you here; -------------------------------------------------------------- From News.com (Intel is an investor in C-Net): <http://www.news.com/News/Item/0,4,13314,00.html> Exponential filed in February 1995 for several patents for a chip that works with both CISC and RISC instructions, said former employees at the company. CISC instructions are understood by chips based on Intel, and RISC instructions lay behind chips running PowerPC chips. By being able to handle both, the universe of programs that work on the chip is greatly increased. The U.S. Patents and Technology Office issued a number of patents for Exponential between January and July of 1996. Meanwhile, Intel filed similar patents for understanding both RISC and CISC instructions in its upcoming Merced processor in 1995. These patents were awarded in 1997. While Intel likely did not have any knowledge of the Exponential patents, the earlier Exponential patents exist as "prior art" of Intel's patents, explained Rich Belgard, a consultant with the Microprocessor Report newsletter. Under the prior art doctrine, Intel cannot enforce its patents if they cover substantially the same operation as the Exponential patents do. And, according to Belgard, the way in which the two patents dictate how a single chip would read the two instruction sets are close. more... -------------------------------------------------------------- From CNN: <http://europe.cnnfn.com/digitaljam/9708/01/chip/> The patents include inventions that could help develop future microprocessor chips, the newspaper said. In particular, the patents could allow competitors to copy a chip called Merced that Intel is designing with Hewlett- Packard without fear of patent lawsuits from Intel. more... -------------------------------------------------------------- From EETimes: <http://techweb.cmp.com/eet/news/97/962news/intel.html> But as Merced draws closer to reality, observers said Intel may have to reckon with potential challenges from an unopened treasure trove of alternative patents that describe ways for a processor to execute RISC and CISC instructions. more... -------------------------------------------------------------- From EETimes: <http://techweb.cmp.com/eet/news/97/968news/expo.html> A handful of patents among the 40 that Exponential is auctioning off could form a powerful weapon against Intel, Auvinen said. The Exponential patents describe ways to use low-level emulation code for processing X86 instructions; a way to send both X86 and RISC instructions down one pipeline; and a shared register file for both RISC and X86 instructions. more... -------------------------------------------------------------- From BootNet: <http://www.bootnet.com/bootwire/97.8/97.8.26.html> Like Merced, the Exponential chip set forth in the patents works with both Intel's CISC-based architecture and the PowerPC's RISC-based architecture. A system using such a chip would be able to run programs from either platform. But since Exponential filed for their patents before Intel, the auctioned patents would be protected under patent law. more... -------------------------------------------------------------- If all these reports are wrong (including the ones already posted and others I've found), I'd appreciate (amonst the inevitable vitriol and denials) a sentence or two resembling a cogent and civil explanation. Ian Bruce New York, NY