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To: Trey McAtee who wrote (37847)	8/26/1998 3:40:00 PM
From: Bipin Prasad	Read Replies (5) \| Respond to of 53903

STANLEY DRUCKENMILLER(sp ?) from Soros funds says there are compelling evidence that it's bottom in US. There're lots rather buying opportunities in US stocks...... Very interesting guy. InSook

To: Trey McAtee who wrote (37847)	8/26/1998 5:06:00 PM
From: Fabeyes	Respond to of 53903

----->the only bright ray of sunshine out there is the delay of 12"wafers. but, who knows how long that will be delayed. I would think, but that is dangerous too, no one will upgrade or have the money to upgrade for 18 months. Should there be any new building it will probably be 12". I don't know if MU is going to convert the Italian fab to 12"; I would say no so they can stick with the same tool set and processes as in Boise.

To: Trey McAtee who wrote (37847)	8/26/1998 5:09:00 PM
From: Fabeyes	Respond to of 53903

TI claims chip manufacturing coup By Jim Davis Staff Writer, CNET News.com August 26, 1998, 12:10 p.m. PT Researchers at Texas Instruments claimed they have developed chip manufacturing technology that will allow them to pack as many as 400 million transistors-the basic building blocks of a processor-onto a single chip the size of a fingernail and run them at breaktaking speeds. These densely packed chips could reach clock speeds of 1 gigahertz. These would also consume less power, making them ideal for portable and handheld devices such as cell phones. By contrast, today's commonly used processors for desktop PCs have up to 7.5 million transistors and run at up to 450 MHz. In general, advanced production techniques allow more transistors to be crammed into the same amount of real estate, thereby increasing the horsepower of the chip. Also, as the transistors are pushed closer together, this increases a chip's speed because the distance between the transistors is reduced. Using comparable measurement methods to today's processors, the TI chips will be made on a 0.1 micron process, while today PC processors are made using the "fatter" 0.25-micron process by companies such as Intel. Next year a select few will introduce 0.18-micron process chips. TI says the new manufacturing techniques will allow the development of some unique applications, such as a hearing aide that could be implanted in the inner ear, or wireless telephones that have video and data capabilities. Among the more pragmatic computing possibilities: hard disk drives that are faster and cheaper. Also, the UltraSparc processors from Sun Microsystems, which TI manufactures for Sun, should see clock speed gains as a result of the new technology. A TI spokesperson said products using the advanced manufacturing process could be available as soon as 2001. Analysts were cautiously optimistic about the announcement. "This is clearly encouraging for the future of the chip industry," said Fred Zieber, president of San Jose-based Pathfinder Research, while noting that in lab conditions, researchers have made smaller transistors but haven't yet developed the manufacturing equipment needed for large scale production of chips. He hypothesized that TI has tweaked current manufacturing equipment to enable production of the 0.07 micron transistors. Indeed, the new manufacturing process would place TI ahead of industry predictions-the U.S.Semiconductor Industry Association estimates companies won't be making chips with 0.13 micron features until the year 2003, for instance. While the company declined to comment fully on the details of its advances, TI is expected to make the chips using copper. Copper conducts electricity better than aluminum, the metal traditionally used for circuitry on microprocessors, and thus is expected to become the metal of choice for microprocessor circuits as chips get smaller and faster. Copper interconnects allow the chip size to be reduced while speed and complexity is increased. TI has also developed technology for creating a layer of insulation around the tiny wires of a chip that reduces harmful electrical effects that sap energy and hinder performance that could be used in making its minutest of transistors.

To: Trey McAtee who wrote (37847)	8/26/1998 6:51:00 PM
From: Fabeyes	Read Replies (1) \| Respond to of 53903

300-mm/ The great leap that didn't happen ELECTRONIC BUYERS NEWS via NewsEdge Corporation : What happened? A year ago, semiconductor suppliers and the companies that produce chip-manufacturing equipment were charging hard down a path toward building ICs on 300-mm (12-in.) wafers. A massive R&D effort, estimated at around $4 billion expended so far, has been under way for three or more years to develop the technologies and equipment for the big wafers. The switchover, participants said, was economically driven. Chips could be built more cheaply on larger wafers. Then came 1998, and the economics changed. Now it's not just the DRAM makers that are staring down the barrel of a serious overcapacity situation. Slash the fab capacity required and re-run your model of the future: Suddenly 8-in. wafers look a lot better. This summer, 300-mm has gone out of fashion, big-time. With business conditions for fab-gear suppliers in the tank, the tap on 300-mm R&D projects has been turned down to a trickle amidst loud industry bickering. Optimists now put the move to 300-mm wafers out somewhere after 2002. Now it's the chip interconnect revolution, with the move to copper traces and low-K dielectric layers. It's not just media noise; a lot of companies are working hard to catch up with IBM. Is copper just the fab R&D technology du jour? The history of semiconductors is littered with dead, dying, and shucked-off "emerging " technologies. Time after time, technologists see a barrier of some sort looming in front of them, and you'll hear them crying "Technology X is going to hit a wall." They then rush off to work on radical new solutions like X-ray systems to replace optical lithography. What is perpetually underestimated is the industry's ability to push the wall back. The engineering community has a congenital lack of confidence about its own ability to solve problems. Maybe it's just a tendency to play it safe. It's better, the saying goes, to err on the side of caution. Guess what? It's better yet not to err. Who cares? Why should OEM consumers of ICs pay any attention to painful gyrations two or three links back up the supply chain? The answer is money. Capital. Investment. That $4 billion, and what it otherwise could have been doing. Whose pocket did it come from? Yours! Copper and low-K, let me interject, help push the wall back on the 300-mm front. The new interconnect technologies don't just increase chip performance; they also help make higher chip density possible. The more you improve density, the more ICs you make per wafer, and the less you need a bigger wafer. Suppose we jump back three years and apply that $4 billion to copper technology: We'd be well over halfway into the transition by now. And we wouldn't have so many fab-gear suppliers gasping for air, threatening to collapse in a heap. Many will be gone in a year. The move to copper is going to take longer because the industry expended so much of its reserves on 300-mm. Badly burned industry players are going to be twice as cautious moving forward. A colossal mistake has been made. Another collective goof of this magnitude could cripple the chip industry and generate widespread economic tsunamis. This is a very delicate time, a time to be careful. But lurking in the details is a lesson about confidence and clarity of thinking: We can't afford to let excess caution cloud our judgment. ú Jeremy Young is EBN's associate publisher/editorial. Copyright - 1998 CMP Media Inc. By Jeremy Young