Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Applied Materials -- Ignore unavailable to you. Want to Upgrade?

To: Gottfried who wrote (23502)	8/28/1998 10:11:00 AM
From: Proud_Infidel	Respond to of 70976

GM/All, Wednesday August 26, 2:56 pm Eastern Time Company Press Release TSMC Sees Broad-Based Momentum in 0.25 Micron Demand Fast Ramp to High Yields HSIN CHU, Taiwan--(BUSINESS WIRE)--Aug. 26, 1998--Taiwan Semiconductor Manufacturing Company (TSMC) has ramped its 0.25 micron process to high yield production in record time to support sharply accelerating customer demand. Volume production has enabled a fast learning curve leading to a low defect density of less than 0.2 defects per sq. inch. This translates into over 70 percent probe yield for a for a large single poly, five layer metal die. Approximately fifteen 0.25 micron customer products are now being fabbed at TSMC. These include products for the CPU, programmable logic, DSP and multimedia market. The 0.25 micron design pipeline is filled with over 30 additional designs planned to tape out in the next four months. More than 100 customers are now running 0.25 micron design libraries from TSMC's 14 library partners. ''Working in close partnership with customers who rely on advanced technology for market leadership has enabled TSMC to ramp deep sub-micron processes into production in step with leaders in the semiconductor industry,'' commented Ron Norris, president of TSMC - USA. ''We began working with customers on this process technology just a year ago. As 0.25 micron moves into mainstream production, we are well underway working with customers on 0.18 micron and beyond,'' he said. ''Our excellent experience with the development of a 0.25 micron process has made us an industry leader in submicron technology,'' said John Turner, Altera vice president of IC design engineering. ''We intend to exploit this leading-edge technology to the fullest advantage, providing our customers with the highest possible volumes of new, faster and lower power PLD products.'' First tape outs on TSMC's 0.18 micron process are expected to take place in the fourth quarter of this year, with initial production release anticipated late first quarter, 1999. By the end of 1998, TSMC will begin production of a low voltage, low power 0.25 micron process for mobile applications; a shrink, 0.22 micron, process for cost reduction of large die; and a logic-based embedded DRAM process for digital signal processing, mobile and networking applications. TSMC's 0.25 micron capacity is ramping to 15,000 wafers per month in 1998 with additional capacity planned for 1999. About TSMC TSMC (ADS traded NYSE:TSM, also traded on TSE) is the world's largest dedicated integrated circuit (IC) foundry and offers a comprehensive set of IC fabrication processes, including processes to manufacture CMOS logic, mixed-mode, volatile and non-volatile memory and BiCMOS chips. Currently, TSMC operates two six-inch wafer fabs (Fab 1 and 2) and three eight-inch wafer fabs (Fab 3, 4, and 5), all located in Hsin-Chu, Taiwan. In mid-1998, TSMC announced that production wafers were being delivered from its first U.S. foundry, WaferTech, a joint venture with Altera, Analog Devices and Integrated Silicon Solution, Inc. The company has broken ground in the new Tainan Park which will house Fabs 6 and 7. TSMC's corporate headquarters are in Taiwan. More information about TSMC is available through the World Wide Web at tsmc.com.