With approximately thirty companies worldwide actively developing more than forty various types of chip scale packages (CSP), the technology is
evolving rapidly in the recent years. We are starting to see applications in telecommunication products, notebook computers, camcorders, etc.
Chip scale packaging (CSP) is currently the hottest topic in IC packaging. The hype machine has definitely moved into high gear on this subject. Concurrently, the
focus on chip scale packaging has renewed discussion on the future of bare die usage and direct chip attach (DCA) methods. Is all this talk warranted, or is it "much
ado about nothing"? Electronic Trend Publications in its report, Advanced IC Packaging Markets and Trends, uses survey data from over 150 IC packaging
industry insiders to present the most realistic answer available to this critical question.
The report begins with an analysis of the market trends and issues for DCA. This market is sizable and its unit growth rate should be higher than the overall IC
industry unit growth rate. DCA units will grow from 1.9 billion in 1996 to 3.7 billion in 2001 for a 15% CAGR.
The report reviews the technical issues which hamper DCA growth such as bare die testing, bare die transportation, PCB routing, solderability, and the lack of
standard die footprints. The market analysis is broken down by the key attachment methods:
ú COB
ú FCOB
ú TAB/TCP
The DCA market is also divided into the key IC product families:
ú Logic
ú Processors
ú Memory
ú Linear
While the DCA market is already sizable and growing nicely, the CSP market is currently small. However, it appears to be poised for tremendous growth. CSP units
will grow from 7 million in 1996 to 3.5 billion in 2001. This is an astonishing 250% CAGR. Such a high forecast would normally be considered outrageous, but it
actually represents a scaling back of the more extravagant estimates received from some members of the survey group. The 2001 forecast represents about a 5%
market penetration of the total IC shipment forecast for that year.
The report reviews the many issue surrounding CSP implementation such as the many different types of CSPs and the need for additional standards, the difficulties in
PCB routing, the lack of a volume CSP infrastructure, testing, and others. The report breaks the market forecast into the generally accepted CSP types of:
ú Flex
ú Rigid
ú Leadframe
ú Wafer level
The market is also divided into the same product classes listed previously for the DCA market. In additional to unit forecasts, forecasts are provided for CSP
package prices and CSP packaging revenue.
The report concludes with profiles of the CSP/DCA related activities of over 20 companies involved in the market. This includes semiconductor companies,
subcontract package assemblers, and technology developers.
If the trends in advanced IC packaging are important to your business, then please take a few moments to review the report's outline on the following pages.
Advanced IC Packaging Markets and Trends will provide you with an effective and economical tool for assessing the future of this market. The report sells for
$1795, with extra copies $250. Order your copies today!
Table of Contents
Chapter 1: Introduction
Background and Scope
Organization
Methodology
Chapter 2: Executive Summary
Chapter 3: Direct Chip Attach
Total DCA Market
Technology and Trends
Infrastructure Issues
Bare Die Testing and KGD
Bare Die Transport
Routing to a PCB and Associated Issues
Lack of Standard Footprint
Alternatives to Solder
Unit Forecast
Pricing Analysis
Forecast by Product
DCA Applications
COB
Technology and Trends
Unit Forecast
COB Applications
FCOB
Technology and Trends
Routing to a PCB
Underfill Issues
A Solution in the Works
Underfill Not Always Required
Die Shrink Issues
Steps for Flip Chip
Unit Forecast
Pricing Analysis
FCOB Applications
TAB/TCP
Technology and Trends
Unit Forecast
TAB Applications
Other DCA Methods
Unit Forecast
Applications
Smart Cards-A Special Case
Chapter 4: Chip Scale Packages
Total Chip Scale Packaging Market
CSP Technology and Trends
Routing to a PCB/the Use of Microvias
CSP Design Issues
Testing
Footprint Standardization
High Volume Infrastucture Needed
Transportation Issues
Placement on a PCB
Attachment Style
Units and Packaging Revenue Forecasts
Pricing Analysis
Forecast by Product
CSP Applications
General Trends
Flex-Circuit Interposer
Technology and Trends
Units, Packaging Revenue, and Pricing Forecasts
Pricing Analysis
Market by Product
Flex Circuit Interposer Applications
General Trends
Rigid Substrate Interposer
Technology and Trends
Units, Packaging Revenue, and Pricing Forecasts
Pricing Analysis
Market by Product
Rigid Substrate Interposer Applications
General Trends
Custom Leadframe
Technology and Trends
Units, Packaging Revenue, and Pricing Forecasts
Pricing Analysis
Market by Product
Custom Leadframe Applications
General Trends
Wafer Level Assembly
Technology and Trends
Units, Packaging Revenue, and Pricing Forecasts
Pricing Analysis
Market by Product
Wafer Level Assembly Applications
General Trends
Other Chip Scale Packages
Units, Packaging Revenue, and Pricing Forecasts
Other Applications
Chapter 5: Company Profiles
Abpac
Amkor/Anam
ASAT
Caesar
ChipScale
Citizen Watch
Delco Electronics
EPIC Technologies
Flip Chip Technologies
Fraunhofer Institute
Fujitsu
Hitachi Cable
Hitachi
Inst. of Microelectronics
Advanced Packaging Roadmaps:
Reality or Ruse?
By E. Jan Vardaman
Just about everyone, it seems, has a particular version of a
roadmap for advanced packaging featuring the latest versions of
a favorite package. Not only does each company have its own
internal roadmap, but key industry organizations, such as the
Electronics Industry Association of Japan (EIAJ), Taiwan's
Industrial Technology Research Institute (ITRI), the Institute for
Interconnecting and Packaging Electronic Circuits (IPC), the
National Electronics Manufacturing Initiative (NEMI), Europe's
Network in Microelectronic System Integration-Packaging
(NETPACK) and the Semiconductor Industry Association (SIA),
are releasing their own versions of future trends in advanced
packaging. But, are these roadmaps realistic? Is the industry
moving too rapidly for roadmaps to keep up with the pace? And,
what is causing all the revisions?
What Drives Roadmap Changes?
A recent presentation from SEMICON Taiwan discussed some
of the factors driving these changes and updates in roadmaps
and provided some great food for thought. [ 1 ] Suggested
reasons for the changing roadmaps include:
changes in the marketplace--wireless products, mobile
computers, portable consumer electronics
changes in the underlying assumptions--faster IC feature
size reductions
adoption of new inventions--chip-scale packages (CSPs),
flip chip in packages (FCIPs) and wafer-level assembly
changes in business strategy--business expansions,
improved product performance and product differentiation
with respect to competitors.
Lessons from past experience and the need to provide packages
that are acceptable to the existing infrastructure also have some
influence on roadmap evolution. For example, many company
roadmaps show the use of chip-scale and flip chip in packages
rather than flip chip on board (FCOB). One reason for this
change is the recognition of bottlenecks, such as availability of
low-cost bumping; low-cost, high-density substrates; and testing
issues.
Changes in the SIA Roadmap
Several changes have been suggested for the upcoming SIA
roadmap. For example, the shrinking complementary metal oxide
semiconductor (CMOS) feature sizes were assumed to be the
pacing factor through the 1994 SIA roadmap, but the actual
shrinkage has been faster than predicted. Power supply voltage
has also decreased faster than originally predicted. These
factors resulted in the need to change the packaging
parameters.
Advanced Packaging Roadmaps by Geographic Region
Advanced packaging roadmaps differ by geographic region.
Many reasons exist for the differences among these roadmaps,
including a variation in products produced in each country.
In Japan, many company roadmaps are driven by the need to
find high-density, low-cost packaging solutions for consumer
products. These roadmaps feature flip chip with gold bumps,
CSPs as an alternative to known good die (KGD) and new
multichip modules (MCMs) that combine both bare die and
packaged parts. EIAJ's forecast for the next one to three years
shows a CSP market explosion as these small packages are
used increasingly in digital camcorders, cellular phones, memory
products and mobile computers; all major semiconductor
companies offer some of their semiconductor products in this
format. MCMs are expected to be increasingly found in notebook
PCs, pagers, radios and many card-size products. [ 2 ]
In Taiwan, semiconductor packaging technologies are driven by
market applications rather than by trends in integrated circuit (IC)
technology. Semiconductor packages are selected to meet the
needs of products such as personal computers, especially
notebooks; consumer products; and telecommunications
products. The key drivers are consumer and portable
electronics. Packaging roadmaps in Taiwan are changing from a
heavy emphasis on peripheral packages, such as quad flat
packs (QFPs), to a focus on area array packages, such as
ball-grid arrays (BGAs) and CSPs, with flip chip increasingly
planned after the year 2002. Multichip packages are often
mentioned as a possibility, subject to solutions of KGD, testability
and reworkability. Plastic packages are expected to account for
the majority of the packages shipped. [ 3 ]
Many North American company roadmaps have featured BGAs
for several years. In the past, many of these roadmaps featured
flip chip on board, but now they feature flip chip in packages.
Trends in IC fabrication remain a major driver for the packages
on these roadmaps, which is one of the reasons for the
emergence of FCIP. CSPs have been slower to show up on
North American company roadmaps but are now becoming a
critical package for size reduction. Semiconductor companies
are packaging flash memory in CSPs, and a variety of products
are being assembled based on the need for a small form factor
package.
Implementing new packages featured on roadmaps into actual
products is a nontrivial task. Celestica (Ontario, Canada) has
introduced a flash memory card that features eight flash memory
devices (four on each side) packaged in a flex-based CSP. The
functioning miniature card, demonstrated in September at
Surface Mount International (SMI) in San Jose, CA, features 8 MB
of memory. The flash memory is used in a digital camera to
record an image, and then, the miniature card is inserted into a
PCMCIA adapter for use in transferring the image to a personal
computer (Figure 1).
FIGURE 1: Celestica's flash memory
card has eight flash memory devices
packaged in a flex-based CSP.
3COM's (Santa Clara, CA) roadmaps also feature CSPs, even
though adoption of the package in the first product was
challenging (Sidebar). The HiPer(TM) Access System's HiPer
DSP card (Figure 2) features 12 to 16 digital signal processors
(DSPs) packaged in Texas Instruments' microStar BGA(TM) and
mounted to a board. Using the small packages, 24 to 32
modems fit into the 6" x 6" area previously occupied by only four
modems--eight times the functionality fits into the same space.
FIGURE 2: 3COM's HiPerr Access
System HiPer DSP card has 12 to 16
DSPs and can fit 24 to 32 modems in
a 6" x 6" area.
Infrastructure development also plays a role in influencing which
packages appear on North American roadmaps. With the
exception of Intel (Chandler, AZ), few companies have listed tape
automated bonding (TAB) as an interconnect choice for
mounting ICs directly to the motherboard because the
infrastructure is not well-developed. Only a few tape suppliers
exist in North America, and equipment suppliers for connecting
the part to the board have been slow in developing.
Roadmaps Become Reality
While advanced packaging roadmaps often require change as a
result of the dynamic nature of the electronics industry, they
serve an important role in helping guide industry players.
Realistically configured roadmaps aid in providing direction to
companies building the infrastructure associated with new
packages and provide a signal as to future trends.
References
1.Wu, Fei-Jain and Paul Lin, "What Causes the Changes in
Packaging Roadmaps," SEMICON Taiwan Packaging
Seminar, September 1997, p. 19.
2.Bonkohara, Manabu and Toshio Sudo, "Worldwide KGD
Activities: KGD Activities in Japan," 4th Annual KGD
Industry Assessment Workshop, September 17-19, 1997.
3.Fu, Shen-Li and Choung-Lin Lo, "Taiwan Packaging
Trends," SEMICON Taiwan Packaging Seminar,
September 1997, p. 29.
E. Jan Vardaman is president of TechSearch International,
Austin, TX, e-mail: jan@TechSearchInc.com.
CSP Implementor Receives "Rabid Dog
Award"
Implementing the first use of chip-scale packages (CSPs) at
3COM was not an easy task. Ron Evans received an
internal company honor, the "Rabid Dog Award," in
September for his team's work in the first introduction of
CSPs for a product.
The internal award was developed by Ross Manier, vice
president of 3COM, to provide an accolade for employees
whose work goes above and beyond the call of duty by
maintaining focus, drive, agility and tenacity on a project.
Presented by Tom Werner, vice president of 3COM, the
plaque features a photo of a Doberman pinscher's head,
teeth bared.
Moving CSPs from just a package on a roadmap into a real
product required just this skill set. The group had to not only
select the package and make modifications for improved
package reliability, but also develop the entire manufacturing
process.
LG Semicon
Motorola
Nitto Denko
Pac-Tech
Sandia Lab
Sharp
Shellcase
Shinko Electric
Sony
Tessera
TI Japan
Toshiba
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