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To: Joe C. who wrote (7616)9/23/1998 11:02:00 PM
From: Obewon  Respond to of 16960
 
Picked up this piece of news on one of 3Dfx's competitors from the Rambus thread:

OB

==========
Technology News

NEC Introduces PowerVR 3-D Engine
(09/23/98 10:54 a.m. ET)
By Anthony Cataldo, EE Times
As it strengthens its ties to Sega Enterprises, NEC Electronics is preparing its PowerVR 3-D architecture for an assault later this year on the fiercely competitive market for PC graphics controllers. The move is part of a strategy to drive the company's 0.25-micron PowerVR into volume production by spinning out PowerVR chips that are identical at their core, varying only in peripheral interfaces and control functions.

At the Japan Amusement Machinery Manufacturers Association this week, Sega announced NEC's PowerVR Series2 device, which was designed in conjunction with NEC's partner VideoLogic, will ship as one of two key processing engines for its new Naomi arcade-game hardware platform. Sega claims Naomi will achieve more than 3 million polygons per second, and boasts a polygon fill rate exceeding 1 gigapixel per second. Naomi is basically a beefed-up version of the Dreamcast game-console platform, which will make its debut in Japan in November.

NEC hopes to piggyback on Sega's strategy with its PowerVR 3-D architecture by spreading across several platforms, beginning with Sega's game consoles and arcade-game systems. Later this year, it will unveil its 3-D/2-D chip for the PC market in hopes of challenging companies such as Nvidia and 3Dfx.

Unlike those competitors, however, NEC decided not to widen the memory bus to 128 bits as a way to boost bandwidth to the graphics subsystem's frame-buffer memory. Charles Bellfield, marketing manager for the VR series, said the company's use of hidden-surface removal, whereby only visible polygons are fully rendered on screen instead of having them overlap, lets the PowerVR graphics subsystem do without a Z-buffer. Such a scheme also boosts the effective polygon fill rate without having to open up the memory pipe, Bellfield said.

The PC graphics chip is designed to interface to a minimum of 2 megabytes of Synchronous Dynamic RAM or Synchronous Graphics RAM, and there are no limits on the expandability of the graphics memory size. The device will support 2X Accelerated Graphics Port with sidebanding as well as 32-bit, 66-MHz Peripheral Component Interconnect. It's also designed to output to both TV-out and flat-panel displays in addition to conventional cathode ray tube monitors.

Along with making improvements to the 3-D pipeline of the chip itself, NEC is looking to bolster performance with faster chips surrounding the 3-D device. For example, NEC is considering using Direct Rambus DRAM and Virtual Channel Memory DRAM as a means to increase bandwidth and reduce DRAM latency. NEC plans to produce both types of memories.

The company also plans to roll out a geometry-setup co-processor, perhaps by next year. The device will be designed to churn out more polygons than general-purpose CPUs, which many observers say create a bottleneck in the graphics subsystem. Most graphics engines are capable of processing triangles much faster.

"The performance of the CPU is too poor to get good detail," Bellfield said. "[The movie] Jurassic Park, for example, had 20 million polygons per second. That's the kind of immersiveness that games want to reach."

That's why Sony is looking toward non-polygon-based 3-D graphics technologies for the next-generation PlayStation.





To: Joe C. who wrote (7616)9/25/1998 12:49:00 PM
From: Jeff Lins  Respond to of 16960
 
How about I make my own press release: "nVidia's Marketing guru (COD= Chief of Deception ) moves to Rendition." Ok, so maybe not, but check out this official info from Rendition (from VE) and see if you don't see any similarities...they even borrow the "keep them in the dark" tactic of TDFX!
-----
The RRedline is an awesome chip. Unless we have royally screwed
something up that has not shown up in testing yet, the RRedline should
smoke a TNT, and will even best two SLI'ed 12 MB Voodoo 2's at most
games. Yes, it really will be that good.

And performance aside, the feature set on the RRedline is second to none.
Who else has even begun to imagine doing dual monitors? Well, we are
already there! The rest of the feature set is just as juicy, if not juicier. No one
else comes close to being able to do all the things we can do - all on one
chip.

I admit the FOW's have been running a bit thin on info lately. They were
originally intended to run just 5 weeks, ending with a general press release at
ECTS. But we managed to close the Micron deal instead, and now we are in
the midst of a few 'transition' weeks while we get everything synched up with
them and their bigger plans.

I can tell you that as of today (9/23/98) I can think of 4 more WOW! FOW
topics. These are things that will blow the competition out of the water -
things that are ultra-top-secret, and that push the state of the art beyond
where anyone else has gone yet.

I'm not sure how many more 'lesser' FOW's I will have to run before we can
get back to the good stuff. It all depends on what plan emerges now that
Rendition and Micron are officially butting heads. But here's a hint to help
start you guessing - two of the WOW features are 3D related, and the other
two tie into video. I can't say any more, but trust me, they are good.
Actually, some of them are so good we might not even mention them until
after the chip starts shipping - just to keep the competition guessing.

I'm also not sure when we will get around to doing a formal press release. It
could be real soon, or Micron may have other plans. We are finalizing the
plans right now for launch, and I am already lining up demo content and
developer support...

So, in summary: The chip is coming, it's gonna kick ass, and with Micron's
resources behind us the plan is nothing less than World Domination.

To discuss Rendition's future chips and the information revealed on this page,
please don't go to the RRedline discussion forum at:

news://news.rendition.com/rendition.rredline