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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Maxwell who wrote (38180)	10/6/1998 12:26:00 AM
From: Yousef	Respond to of 1574178

Maxwell, Re: "I am saying that Intel has much tighter control in their poly cd than +/- 20nm and their 0.25um process cd is NOT 0.22um!" Maxwell, please re-read my previous post to you --> Message 5904842 " Maxwell, Intel has a couple of "revisions" of the .25um process ... One targeted at .19um printed linewidth and another at .22um printed linewidth. At each of these there will be about +- 20nm variation ... Anything outside this will be reworked. So the speed distribution really is a truncated gaussian. The process for the 450mhz part will go above 500mhz, with 90% speed yield targeted at 400mhz - 425mhz and 75% speed yield at 450mhz. The "longer" gate (.22um) process will go above 400mhz." Re: "And Ali is right" No, Ali is wrong ... and ... You posted the reason why. <ggg> Your post HYPE'd the fact that as a chip/FET is cooled down, it's switching characteristics improve and give much faster CPU operating speeds. This directly proves the importance of FET characteristics and NOT Ali's silly statements about the "architecture thing". Re: "With a +/- 5nm that tool can resolve 10nm difference with ease." You obviously don't know much about process control. First, the accepted precision to tolerance (P/T) should be 10X better precision than the specification. Secondly let me give you an example ... Let's say that you measure a poly line on your SEM and it is at the edge of spec (mean spec. + 10nm). This means with the uncertainty of the SEM measurement tool, that measurement could actually be (mean spec + 5nm) OR (mean spec + 15nm). This is too wide a variation to produce useable device BSIM models. I hope you are just "joking" around again. Make It So, Yousef