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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Petz who wrote (38234)	10/5/1998 11:06:00 PM
From: StockMan	Read Replies (1) \| Respond to of 1574267

P, Is the K7 a super duper chip or what..

To: Petz who wrote (38234)	10/5/1998 11:20:00 PM
From: Maxwell	Read Replies (2) \| Respond to of 1574267

John Petzinger: I have tried to tell the Intelabees about the amazing K7 but they think I am crazy. Nevertheless thanks for the update. Looks like the K7 will be one hell of a chip to beat. I have much respect to the Nexgen designers and Atiq. When they say something you better believe it. Let me repeat, the K7 will be the world fastest X86 chip by the time it releases. Maxwell

To: Petz who wrote (38234)	10/6/1998 1:15:00 AM
From: Brian Hutcheson	Respond to of 1574267

news.com Hi Petz , Good post on K7 , the above PR indicates 4M K6-2 according to Edelstone , hope he is correct . I believe that the ASPs on the estimates are all too low . I have kept track of K6-2 prices over the last month on pricewatch and feel the ASP could be $120 . Also a report on 25 Sept "AMD plans deep K6-2 cuts" stated that AMD was selling the K6-2 300 for $129 at that time . You also missed out the 333mhz chip in your estimates , Brian

To: Petz who wrote (38234)	10/6/1998 1:54:00 AM
From: Tenchusatsu	Read Replies (1) \| Respond to of 1574267

Petz, thanks for the article about the K7. A bunch of things I wanted to point out as a regular devil's advocate: 1. Will "launch...higher than 500 MHz." It better, or else K7 won't be able to match Intel's latest and greatest by the time of its release. "The [bus] protocol allows it to run at very high bandwidth. The frequency is going to be in the hundreds of MHz. I seriously wonder what the purpose of this is. Obviously the guy's talking about a point-to-point connection between the K7 and the north bridge. To me, P2P's advantage over a multiprocessor bus seems to be the very high data transfer rate. But its disadvantages will be the costliness of SMP implementation (think about the huge number of pins you have to add just to support a 2nd processor) as well as a higher latency compared to a bus paradigm. Correct me if I'm wrong. "We will [beat Intel's floating point performance]. The floating point in the K6-2 -- the classic IEEE-built precision floating point -- is not of the quality I would like it to be... With K7 we will make no apologies. Double-precision/ Single-precision, 3D technology extensions as well as double-precision classical IEEE floating point. Again, the K7 will be the highest performance processor, in both integer and floating point." Well, it seems that AMD will definitely be pushing on the FP strengths of the K7. Just as I thought, AMD is going to add more to its 3D-Now instruction set. I wonder if its 3D-Now allies like Cyrix and IDT knew about this. Whether or not the K7 will beat the P6 in floating point remains to be seen. But then again, the P6 was hovering there like a huge target for quite a while now, and I would be somewhat surprised if AMD allowed their K7 engineers to aim anywhere below the P6 mark. "We intended K7 to be a server product, and to take advantage of the server infrastructure provided by Alpha. But at the same time, having a cost structure and capability that would make it a compelling consumer product and a compelling commercial product too." Once again, this is as I expected. AMD is building on the server experience developed by Digital/Compaq so that AMD wouldn't have to start from scratch. How well AMD markets its K7 server solutions should be interesting indeed. Of course, no where did the guy mention any interchangeability between the K7 and the Alpha, which to me would have been a suicidal business strategy. "For the most part, the K7 will be a fully three-way superscalar. The 3D pipeline is a 128-bit-wide pipeline, and it too will include backward compatibility with the 3D extensions. The floating point and 3D performance is just awesome. It's a vector engine, so you can process more floating-point arithmetic in parallel." This statement is pretty underwhelming in light of Katmai. Nothing except the main FP unit promises to be anything superior to Katmai. After all, Katmai is 3-way superscalar, and KNI will have a 128-bit-wide 3D pipeline. It's very possible that using 3DNow you could get eight single precision floating point ops per clock cycle, or two double precision floating point ops per clock cycle. (Four 32-bit operands per 3DNow instruction, two 3DNow instrucions retired each clock cycle.) In comparison, we still don't know whether Katmai will retire one or two KNI instructions per clock cycle. My personal guess is that Katmai will retire one KNI instruction per clock, and future 0.18-micron offerings from Intel like Coppermine and Cascades will retire two. Conclusion: AMD probably told its engineers "It's the floating point, stupid!" when it worked on the K7. (Either that, or the interviewee was the head of the floating point unit, which would explain his excitement over FP.) Still, there isn't much in the interview to suggest that the K7 will be vastly superior over Katmai/Tanner (or Coppermine/Cascades) in any area other than the regular FPU. Anyway, once again thanks for the inside info on the K7, Petz. This should clear up any confusion over the rhetoric that the "P6-killer" or "Yet Another AMD Flop" crowds were shouting. Tenchusatsu