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To: Scumbria who wrote (66008)	10/7/1998 9:25:00 PM
From: nihil	Read Replies (1) \| Respond to of 186894

RE: Supercomputer The problem is to get thousands of processors to work together on a single code (or problem). This is doable for IPP (inherently parallel problems), but but involves enormous waste for mixed parallel-sequential problems. Intel has funded a neat project at Berkeley-LBL too interconnect a large number of workstations and configure them on the fly to process at the appropriate degree of parallelism, and to let them go about their individual business when they aren't needed for the gang thrash.

To: Scumbria who wrote (66008)	10/7/1998 9:38:00 PM
From: VICTORIA GATE, MD	Read Replies (2) \| Respond to of 186894

Intel to offer new chip design By James Niccolai InfoWorld Electric Posted at 4:58 PM PT, Oct 7, 1998 SANTA CLARA, Calif. -- Intel here on Wednesday sketched out its microprocessor road map, including plans for a new 32-bit microarchitecture that over time will replace the current P6 design on which the Pentium II processor is based. The new microarchitecture will incorporate a number of technology improvements that will allow the company's processors to execute software applications faster. The new architecture will be introduced in late 2000 or early 2001 via a microprocessor code-named Foster. Intel is targeting clock speeds of 1 gigahertz and beyond, which will help Intel maintain a lead in the volume workstation and server markets, said Fred Pollack, an Intel director and Intel Fellow at Intel's Microprocessor Products Group. At about the same time, Intel will introduce a processor targeted at high-end desktop PCs that will be based on the new architecture, code-named Willamette. Like Foster, Willamette will target clock speeds of 1 gigahertz, and both chips will carry at least 1MB of on-chip Level 2 cache, which boosts the chips' performance, Pollack said. Foster and Willamette will both be manufactured using 0.18-micron manufacturing technology. Wednesday's announcement shows that as Intel readies its first 64-bit processors next year, the company is continuing to advance its IA-32 architecture in tandem, Pollack said. Intel is also on track for delivery in mid-2000 of the Merced 64-bit processor for the high-end workstation and server markets. Intel will make chip sets that allow Merced to be used in configurations of as many as four processors but will leave it up to its system manufacturing partners to develop their own chip sets for use in eight-, 16-, and 32-way systems, Pollack said. About a year after Merced debuts, Intel in late 2001 plans to release McKinley, a 64-bit processor for high-end workstations and servers that will offer twice the performance of Merced, Pollack said. In 2002, when it moves to a new 0.13-micron manufacturing technology, Intel will produce lower-cost versions of McKinley for the volume workstation and server markets.