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To: Yousef who wrote (29834)	10/11/1998 2:52:00 PM
From: Joe NYC	Respond to of 33344

Yousef, Cayenne retains the integer unit of the MII/6x86MX. Is this good news or bad, Bob ... Let me guess ... This is very bad news. The integer unit of MII is the best one out there as far as performance per clock cycle. The question about Cayenne is if they can increase the clock speed to 300 to 400 MHz range, and L2 cache. Joe

To: Yousef who wrote (29834)	10/11/1998 7:20:00 PM
From: Jim McMannis	Respond to of 33344

The integer unit of the MII is excellent. It's the FPU that was bad. So they attach a new one. Still, they have to get the clockspeeds up or they will have a tough row to hoe. Jim

To: Yousef who wrote (29834)	10/11/1998 10:12:00 PM
From: Craig Freeman	Respond to of 33344

Yousef, re: "integer unit of the MII/6x86MX." The integer unit of the MII runs circles around anything Intel. In my tests and in published benchmarks, it easily tromps the PII. You must have been thinking about the MII's FP unit, which is slow as sludge. IMHO, the race is not between the PII and the MII but rather between MXi and the K6-3/K7. If either Cyrix or AMD produce on time, Intel will have to issue a socketed CeleronA 450 just to keep the playing field even. I wouldn't bet on either AMD or Cyrix individually but there are at least two chances here to bust up Intel's roadmap. Of course, Intel probably has warehouses full of 600 MHz Coppermine chips waiting to ship ... "just in case". Craig