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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Kevin K. Spurway who wrote (39396)	10/15/1998 1:58:00 PM
From: Jim McMannis	Read Replies (1) \| Respond to of 1588626

What is this? Could it be the K6-2-400 will really be the K6-2+...which would mean the K6-3 isn't far behind? From Tom... This is not all though. AMD is very close to shipping the K6-2 at 400 MHz. This CPU will not just be the well-known ‘normal' K6-2 core merely running at 400 MHz, but it will use a new revised core, which offers increased performance. This way the K6-2 400 will hardly fall short against Pentium II CPUs at the same clock speed Jim

To: Kevin K. Spurway who wrote (39396)	10/15/1998 2:15:00 PM
From: Tenchusatsu	Read Replies (1) \| Respond to of 1588626

Thanks for the link, Kevin. There are a few things in that article which suggests to me that Tom Pabst was swindled by a new-car salesman: <One reason why AMD is not shipping Sharptooth yet is that the OEMs don't want AMD launching a new CPU right before the Xmas market, and the other reason is that AMD expects that the OEMs pay a higher price for this significantly improved product, which still is subject to negotiations.> Uh huh. Considering that OEM's don't have inventory problems anymore, I find it very hard to believe that they would just tell AMD to hold off on a product which can legitimately compete against Intel's high-end Pentium II. <K7 will have no less than 128 kB L1 cache, 64 kB data and 64 kB instruction cache. Pentium II is currently equppied with a quarter of that and it's rumored that Katmai may have at least 2x32 kB and thus half the L2 cache sizeof K7. The large L1 cache is one of the requirements for very high CPU clock speeds, and K7 was specially designed to reach those very high clock speeds.> Uh, doesn't a high CPU clock require a small L1 cache because it is faster than a large L1 cache? I don't think Tom knows the basic rule of caches which states that smaller and simpler is faster. I suspect that AMD is touting the huge 128K L1 cache but hiding the possibility that the cache will have higher latencies. I'm sure AMD has their reasons for going with such a huge but potentially slower L1 cache. But it's obvious that Tom doesn't know both sides of the story. <The K7 will have an address space of 64 GB as Intel's Deschutes core, and Slot A will be limited to 4GB addressable space as in case of Slot 1.> This has got to be a mistake. I thought AMD wanted to push into the server and workstation markets with K7. If Slot A can only address 4GB of main memory, unlike Slot 2 which can address all 64GB, then that would be insuitable for memory-hungry servers unless AMD has a future Slot A+ in the works. Perhaps Paul is right, and AMD is now repositioning the K7 to go against Intel's high-end desktop line, instead of becoming the great "Xeon-killer" that people hoped for. <The upcoming seventh generation AMD processor will run CAD or rendering software faster than the Intel CPUs. That is almost a revolution.> Of course, of course. I'm not saying that AMD can't do it (they probably can), but the tone of this statement once again suggests to me that Tom was listening to AMD marketing a little too much. I guess I'll just have to wait until Tom's benchmarks to see how well the K7 can compete against Intel's latest and greatest by the time of its release. But I'd also be a little suspicious, since Tom seems to be putty in the hands of AMD marketing, and those benchmark numbers could be prone to tweaking in favor of the K7. Tenchusatsu