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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Yousef who wrote (39837)10/21/1998 11:27:00 PM
From: Maxwell  Read Replies (2) | Respond to of 1579136
 
Yousef:

I am disappointed in you Yousef. Not only you don't understand
device physics you don't know mathematics and manufacturing. I suggest you pick up a Treatise of Mathematics and a crash course
in semiconductor manufacturing. Listen up boy.

Your premise:
<< On a properly designed device, Idsat and Ioff aren't directly related.>>

<<What really affects Ioff is changes in Vthreshold (Vt).>>

What this mean is that Idoff is a function of Vt or written as
Idoff(Vt).

<<What affects Idsat is primarily Leff and Vt.>>

What this mean is that Idsat(Leff,Vt). If you know Idoff(Vt) and
Idsat(Leff,Vt) then I CAN WRITE the following FUNCTIONS

Idsat(Leff, Idoff) and Idoff(Leff, Idsat)

Thus they are directly related. That is just a mathematical proof.
Now let me give you a lecture. Let's say a 8" batch of PII were made
to target at 400MHz. A batch consists of 25 wafers and let's say a
batch will yield 3000 dice (I am being generous here). If you were
going to measure the Idsat and Idoff of each of those chips you will collect 3000 data points. If you plot the Idsat vs Idoff you will
get a universal curve (a scatter plot) and that curve will show you that as Idsat is increased the Idoff will increase. The reason this is true is that your process is not perfect from wafer to wafer and dice to dice. This process variation will cause some Leff to be larger than other. Some Leff may be too small within your design and as a result get leakier. As you can see I am talking 1 technology, 1 FET design, and 1 process flow. In real life there is no such thing as ZERO NOISE, ZERO ERROR, AND PERFECT PROCESS.

Maxwell