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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Jim McMannis who wrote (39968)	10/24/1998 12:58:00 PM
From: Maxwell	Respond to of 1574051

Integrated L2 Cache on K7? Lately there have been a lot of trash talking by the Intelabees on the K7. Their premise relies on the fact that the K7 is slower than Intel PII with integrated L2 cache (most likely 512K L2 in Cascade or Tanner). They think that integrated L2 is the answer to everything when it comes to performance. Well let's do a comparison. PII has only 32K L1 (16K-I/16K-D) cache while K7 has 128K cache (64K-I/64K-D). What this means is that the PII miss rate will be higher than K7. Thus PII will have to rely on the L2 more than the K7. With off chip L2 cache on the K7 the L2 on K7 will run either 1/3, 1/2, 2/3, or 1X clock speed (same as Alpha) as CPU. The latency for the L2 for K7 will be indeed larger than PII with integrated L2. Most likely AMD will go for the cheaper SRAM for lower cost. The advantage however will be that the K7 can be packed up to 8M of L2. This along with the big L1 cache will more than sufficient to overcome the 512K integrated L2 on PII. The final deciding factors will be execution units and memory bandwidth. Memory Bandwidth: This is and will be the bottleneck for future computer systems. The memory is where the O/S and most applications reside. To get instruction the CPU must access the memory constantly. K7 will have twice the bandwidth of PII/Xeon systems. With PC100 SDRAM, K7 will have 1.6GB/sec vs. 0.8GB/sec on PII. This is where performance will scream. This is exactly why Alpha is currently the fastest. Even if Intel goes to 133MHz bus their memory bandwidth will trail K7. Thus K7 platform will smoke PII platform. Intel will eventually go to Rambus to get higher bandwidth but the disadvantage is that the memory latency on Rambus is worse than SDRAM and the cost is higher. CPU Horsepower: K7 will have 9 execution units versus 5 for Intel. If the data is available to process k7 will smoke PII logic core anytime. K7 have 3 FPU, 2 excution and 1 store while Intel has only 1 FPU. K7 can do 4X PII at peak rate in double-precision calculations and will do 2X in single-precision. K7 and PII core are both pipelined. K7 will hold a record in raw FPU power. In term of integer calculation K7 will surpass Alpha 21264 at same clock speed and blow away PII core. The reason is simple. K7 has 3 integer units and 3 store units versus Intel PII of 1 store, 1 load, and 1 integer. ________________________________________________ Conclusion: The Cascade and Tanner will be one fast chip but the platform will be constrained by the memory bandwidth and execution resources. Alpha bus and K7 will alleviate this problem and thus will outperform Intel Cascade and Tanner. Intelabees may argue that Intel will have higher MHz than AMD. Well don't count on it. Like Ali has said, AMD got the people from DEC who understand low-tick design to design the K7. AMD will match everything that Intel has when it comes to aluminum process. With Motorola's help in the copper interconnect, low K, and SOI, K7 will have no problem beyond the 0.18um and the 1GHz barrier. Now Intelabees resort to the argument that K7 is vaporware and foil flipping. Well AMD will demo the K7 in Nov. at Comdex. Damn. That is pretty fast from going foil flipping to demo a K7 system. Only idiots would think that PII platform is superior to K7 platform and only idiots would think that K7 is only foil flipping. Maxwell