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To: Tenchusatsu who wrote (68566)11/15/1998 12:56:00 PM
From: jim kelley  Read Replies (2) | Respond to of 186894
 
For high end servers it makes more sense to have an overall architecture rather than just an I/O architecture. There needs to be an memory as well as a processor design. The ability to R/W to memory at a 3.2 GB rate can be done at lower clock speeds by use of interleaving and increased parallelism in the memory and bus designs.Point to point connections for the duration of transfer is essential. Balanced memory hierarchy design is essential. Backwards compatibility requires special bus protocol converter chips.

Is Intel doing anything to address this larger issue?