Intel demo shows Rambus getting ready to roll
By David Lammers
EE Times
(11/20/98, 2:14 p.m. EDT)
LAS VEGAS ‹ Taking its Rambus program closer to the goal of having
next-generation systems on the market next summer, Intel Corp. booted a
Windows machine based on the Rambus memory architecture at Comdex
earlier this week.
The demo, which ran a game called Forsaken, came as PC makers are knee
deep in the process of testing newly received samples of the processors,
chip sets and memory modules that are expected to drive the new memory
architecture forward.
"This is a platform demonstration with the Rambus channel operating at
the full 400-MHz speed," said Pete MacWilliams, a fellow at the Intel
Architecture Labs (Hillsboro, Ore.). "We wanted to show the whole system
integration using the Rambus technology ‹ a full motherboard with all of
the routing ‹ to show where we are at with all of the electrical and
mechanical issues."
Other sources said Intel began shipping prototypes of its Camino chip
set to computer vendors earlier this month. Camino supports the Direct
Rambus DRAMs (D-RDRAMs), which deliver a peak bandwidth of 1.6
Gbytes/second over the Rambus channel. A spokesman at Intel's Folsom,
Calif., operation said the Comdex demo included "a prototype memory
controller" on the Pentium II-based machine, but declined to confirm the
reports on Camino.
Tests of the major components of the first generation of Rambus-based
PCs "are going on in real-time," said Jan Janick, vice president of
development for IBM Corp.'s client systems. "The next 30 days will tell
whether we can ship these boards in volume on schedule. But I am already
a week later than I wanted to be."
Intel's MacWilliams said the Rambus-based PCs would have two to three
times as much bandwidth as the PC-100 generation on the market today.
Though one source said Rambus-equipped desktops could be ready as early
as next April, Intel is shooting for a summer debut. Those desktops
would "not just be BX-based machines with Rambus memories," said Jan
Camps, an Intel manager working on the Rambus program, referring to the
BX chip set now in production. Intel expects PC OEMs to deliver a host
of technologies surrounding the faster memory architecture, including
next-generation graphics, security for electronic commerce, DVD drives
and other features discussed at the recent Intel Developer Forum.
Camps said Intel envisions a speed sort of the D-RDRAMs, with 400-MHz
parts going to "performance" desktops and a 300-MHz model to sub-$1,500
machines. That would help ensure higher revenue ‹ and less wastage ‹ at
the DRAM vendors.
As of this week, MacWilliams said Intel had tested 64-Mbit D-RDRAMs from
eight vendors, with Rambus in-line memory modules (RIMMs) in hand from
LG Semicon, Samsung Electronics, NEC Corp. and Toshiba Corp.
The machine shown at Comdex included eight 64-Mbit D-RDRAMs on a single
RIMM, with "continuity" modules inserted in the other RIMM slots to keep
the entire electrical path intact. Intel has succeeded in booting other
systems with 32 devices on the channel, MacWilliams added.
The cost of the Rambus technology remains an issue, and Intel recently
invested $500 million in Micron Technology Inc. (Boise, Idaho) to ensure
that Micron puts its full weight behind the RDRAM.
128-Mbit start
Wringing the cost out of the Rambus parts will be a major objective next
year, and several DRAM makers will jump to the 128-Mbit density to jam
more bits into the relatively expensive chip-scale package. The higher
density also will reduce the number of high-speed logic testers required
to test the Rambus interface circuitry.
IBM Microelectronics will come to the Rambus memory market initially
with a 128-Mbit D-RDRAM in late 1999, using a 0.2-micron process, said
Lane Mason, a senior strategist based in Burlington, Vt. That design
eventually could be manufactured at IBM fabs in Burlington and in
Essonnes, France, and at the IBM-Toshiba joint venture, Dominion
Semiconductor Corp., in Manassas, Va.
Mason said the die-size penalty over synchronous DRAMs that's incurred
by using a 0.25-micron process at 64 Mbits would not produce a
cost-effective solution. Nor is IBM ready to jump to 256 Mbits, which
will require first 0.17-micron and then 0.15-micron technologies.
"We view the 128-Mbit as the point where IBM can pick up the hunt, but
the 256-Mbit generation is the point where RDRAMs will be the majority,"
said Mason. "The Rambus memories will require more capital equipment,
but that is the same for any high-performance memory."
Samsung also will emphasize the 128-Mbit generation, said Avo Kanadjian,
a vice president at Samsung Semiconductor Corp. (San Jose, Calif.) Most
performance desktops will ship with 128 Mbytes of base memory, which can
be satisfied with a single module populated with eight 128-Mbit
D-RDRAMs. It is more cost-effective to spread the additional package and
testing cost over eight 128-Mbit parts than sixteen 64-Mbit parts, he
said.
In Kanadjian's view, the 64-Mbit D-RDRAM will be an "enabler" that will
allow computer OEMs to get their Rambus-based systems validated and out
on the market; the 128-Mbit density will meet volume demands.
Kanadjian predicted that by the second half of next year a Direct Rambus
DRAM will carry a component-level premium of 30 to 35 percent over
SDRAMs. That will improve to "the mid-teens" in 2000, he said.
He discounted fears that the supply of RDRAMs will not be able to meet
demand. Samsung is investing about $250 million in its Austin, Texas,
fab to increase wafers per month to about 21,000, he said. Samsung will
use a 0.23-micron process for its 128-Mbit Direct Rambus parts, moving
to 0.18 micron for the 256-Mbit generation.
Back in South Korea, Samsung will increase its micro-BGA packaging
capability, as well as its RIMM module manufacturing and testing
facility, Kanadjian said.
Intel's MacWilliams said that during last year's push to bring up the
PC-100 specification SDRAMs, "we learned the hard way" that work with
the memory-module industry is essential. "With the PC-100 program the
module makers picked up our Gerbers [for pc-board layout] and
specifications, and went off to do it. With this [Rambus] generation, we
will have a lot more interaction with the module industry."
At Tanisys Technology Corp. (Austin), the work required to manufacture
and test the RIMMs is topic No. 1. Joe Klein, an engineering manager at
Tanisys, said the shift to chip-scale packages on the D-RDRAMs will come
in two versions: center-bonded and edge-bonded CSPs, requiring separate
RIMM designs from the module makers.
"Noise is critical with the RIMM design because the voltage swing on the
Rambus memories is a lot smaller at higher frequencies," Klein said.
"From a system standpoint, I like the Rambus approach, because the
channel has an even distribution of the data and instruction wires,
whereas with the SDRAM-based DIMMs there was a much more uneven
distribution."
The SDRAMs come in thin small-outline packages, and it was relatively
easy to inspect the fillup. Tanisys will buy X-ray inspection equipment
to ensure that the solder balls on the CSP are properly attached to the
board. With the CSPs, "the via size on the pcbs is larger than the pads
on the chips, so soldering becomes an art," Klein said.
Also, he said, the module makers will need to be more vigilant about
controlling impedance, with tolerances that are half that of the DIMMs
used in the PC-100 specification. The RIMMs also will require a heat
sink clamshelled around the module, and thermal stress will be a bigger
issue.
"With the PC-100 modules it was more of an evolution. The Rambus
generation is a revolution, but there aren't any particular issues that
can't be solved," said Klein, who earlier worked at IBM's memory
division.
One Tanisys division makes module testers sold under the Dark Horse
brand, and that group is preparing the software and hardware required to
test the RIMMs at speed. That work should be finished by the first
quarter, said Don McCord, marketing manager at Tanisys. |
