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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Paul Engel who wrote (42137)	11/23/1998 5:53:00 PM
From: Scumbria	Read Replies (3) \| Respond to of 1571785

Paul, Your answer makes no sense - so a 1/100000 CPU bus speed L2 Cache would be just fine if the SRAM had zero latency? Good question. There are second order effects which come into play if the second, third and fourth beats of data are stalled for too long. 1. The memory subsystem becomes unavailable. 2. Other data from the cache line is not available. Practically speaking, one or two beats difference does not cause a huge second order effect. 100000 beats would be a problem however ;^) I have heard that Intel CPU's with full speed caches do not show much performance improvement over their half speed counterparts, for desktop benchmarks. Can anyone confirm or deny these rumors? Scumbria