To: Scumbria who wrote (42218 ) 11/26/1998 1:40:00 AM From: Petz Read Replies (3) | Respond to of 1572191
Scumbria: <<The onboard cache on K6-3 systems will produce a smaller percentage performance gain vs. K6-2, than the onboard cache on CeleronA systems did vs. Celeron.>> You are forgetting a few things: 1. The core of the K6-3 has been improved considerably with write combining and other tweaks. We'll see how much of an improvement this makes in a few days when the first K6-2-400 reviews come out. (It has been confirmed that the core of the new K6-2 'CXT' chips is the same as the K6-3. 2. Adding cache to the Celeron improved Winbench scores by OVER TWO SPEED GRADES, and that was only 128K. Cacheless, had MMX200 performance, with cache PII-300 performance. 3. A "speed grade" at the bottom end (200 - 300 MHz) is relatively significant. At the top end the performance gain going from 400 to 450 is hardly noticeable, since I/O wait time is a significant part of the benchmark time. A 20% speed increase at the top end is more "speed grades" than a 25% increase at the bottom end. 4. Bob Silvano at AMD has confirmed that L3 cache on the motherboard, even 512K of it, DOES help performance. 5. In fact, Mr Silvano stated exactly what Brian Hutcheson started this thread with, the performance improvement of a K6-3 vs a K6-2 is comparable to that between a Celeron 300 and a Celeron 300A. Heres the straight poop from chiptech.com : 98/11/21, 7:40pm - More cool stuff from Bob at the chat: Consider the performance difference between the Celeron (pre-Mendocino) and the P-II. That's not exactly correlated to the K6-2 and K6-3 but it does give you an idea for the performance difference. We actually gain more on top of that since the K6 core is more emphasized in its ALUs than its external memory architecture. I promise you, you will not be disappointed, and K6-3's will make great gamer upgrades. <Bob_AMD> We at AMD were surprised to find that the on board L3 cache actually was still effective! <Olojin> To what degree? <Bob_AMD> We have not fully characterized this effect yet, but I personally have already posed the theory that since the L2 cache is 4 way set associative and the L3 cache is direct mapped, that they would tend to cover memory differently, and thus tend to act together as a larger cache rather than as overlapping caches. ////////// end qutoe ////////// Petz