LSI Logic Delivers Best-in-Class Price/Performance TinyRISC(TM) EZ4102
EasyMACRO Concept Packs Pre-Defined Blocks Together With the TinyRISC CPU Core
As a Highly Design-Efficient, Cost-Effective CPU Subsystem
MILPITAS, Calif., Dec. 7 /PRNewswire/ -- LSI Logic Corporation (NYSE: LSI), the world's leading developer of system-on-a-chip solutions for the consumer electronics market, today announced release of the TinyRISC(TM) EZ4102 (EasyMACRO) microprocessor. The EasyMACRO, pioneered by LSI Logic, is a CPU subsystem that incorporates a group of popular logic building blocks including the world's smallest microprocessor core, measuring about the size of a pinhead.
The EasyMACRO CPU subsystem represents a focused architecture for the highly cost-sensitive consumer electronics embedded market. The EZ4102 is well suited for applications such as set-top boxes, digital TV, DVD, digital cameras, GSM digital cellular phones, small office/home office (SOHO) network routers, convergence PCs, and a wide array of emerging embedded applications including smart cards for banking, toll booths, and shopping; security ID, wireless communications, cable modems, and integrated automotive entertainment and control units.
"We've found that our customers use certain blocks of logic over and over. With the EasyMACRO, the designer saves time by eliminating the need to lay out those popular building blocks, thus achieving a lower design cost and improving time to market." said Karen O'Connell, director of consumer technology marketing at LSI Logic. "By combining the CPU core with these pre-defined blocks, we're not only easing the integration cycle for system designers, but we're also saving them a significant design verification effort. In the embedded marketplace, a few weeks saved means a lower system cost and a time-to-market advantage."
This highly compact CPU subsystem enables the system designer to integrate higher silicon content in the same die area for cost-sensitive, system-on-a-chip (SOC) consumer electronics designs. The EasyMACRO is a self-contained, well tested CPU subsystem with commonly used logic blocks. The EasyMACRO also includes leading-edge, non-intrusive SerialICE(TM)-2 (LSI Logic's fully EJTAG compliant on-chip debug methodology) on-chip debug, which provides in-circuit emulation (ICE) functionality on chip. This gives the designer an easy, low cost way to debug both hardware and software.
On-Chip Debug
The EZ4102 provides on-chip debug through use of LSI Logic's leading SerialICE-2 EJTAG-compatible feature. SerialICE-2 provides the system designer and software programmer with an easy and efficient way of emulating and debugging the operations of the CPU deeply embedded in a system-on-a-chip, speeding time to market.
SerialICE-2 is based on the MIPS Enhanced JTAG (EJTAG) debug solution, which also allows reuse of the pins for the boundary scan JTAG port. It has fundamental debug features like CPU run control, single step, software download, and it also provides advanced features like hardware breakpoints, complex breakpoints, real-time PC trace, overlay, and code profiling.
SerialICE-2 is particularly valuable for high-volume, deeply embedded consumer electronics applications. It provides the system engineer a quick and highly effective method for accessing the embedded microprocessor core to check and test its different sections or to run through different software routines. SerialICE-2 also allows the system engineer to obtain data out of the microprocessor for analysis purposes and significantly speed up the troubleshooting process.
LSI Logic has successfully completed a software CPU model of the EZ4102 and is currently working with leading third-party tool suppliers to support the EZ4102 with hardware/software co-simulation, tool chains, and SerialICE-2 debug support from Green Hills Software, Inc., Santa Barbara, CA, and other vendors.
"Our plans call for front to back support of the EZ4102 with our MULTI integrated development environment," said John Carbone, vice president of marketing at Green Hills Software, Inc. "The MIPS16 architecture is a powerful answer to the code size challenge. The ability of the designer to pinpoint which functions to run and the ability to achieve a user-specified code size automatically, gives the developer an easy, powerful way to exploit TinyRISC's strengths." |
