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To: Bernard Super who wrote (11311)	12/7/1998 4:42:00 PM
From: TigerPaw	Read Replies (1) \| Respond to of 93625

NAND NOT AND The boolean logic uses three operations. AND where both (all) inputs must be 1 for the output to be 1, OR where the output is 1 if either is 1, and NOT where the output is the opposite of the input. All of the boolean logic can be duplicated by a NOT AND or NOT OR gate instead. The use of the same gate type throughout the chipset generally allows for a more uniform, therefore smaller die size. AMD apparently has a streamlined layout based on the NAND (NOT AND) layout. In a general NAND layout there are two transistors with inputs, One feeds the other one so the electricity flows from T1 to T2 to the output (T1 & T2 can each be switched on or off). In a NOR circuit T1 and T2 are side by side with the electricity going through both (if they are both on). A third element needs to be placed after the two to determine the output (usually a diode). Since this is a flash device there are usually diodes needed to hold the charge in a capacitor and a drain switch to erase the capacitor. In a clever layout some of these are reused from the logic. This would make more sense with a picture. TP