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To: FJB who wrote (1687)	12/11/1998 7:40:00 AM
From: Platter	Read Replies (1) \| Respond to of 3813

From TheStreet.com...."Herb on TheStreet: More Chip Chatter By Herb Greenberg Senior Columnist 12/11/98 6:30 AM ET Fried-Day: Sorry to sound like a broken record, but: I continue to hear queasy info about chip supply and demand. The 83% rise in the Philadelphia Stock Exchange Semiconductor Index to its high from its lows in October reflected a widespread belief that chips are in short supply. However, discussions with several very well-wired and always reliable money management sources, whose clients come from chip- and PC-related industries, indicate the mood of those clients has changed dramatically in recent weeks. They say prices have started to fall rapidly, especially on the lower-priced chips like Intel's (INTC:Nasdaq) Celeron, supplies of which are now plentiful. The excess supply, and falling prices, is especially noticeable with DRAM memory chips, which are starting to slide from their recent highs. (Seems the renewed push toward full production by the Koreans, as this column mentioned several weeks ago, is finally starting to take hold.) Even the American IC Exchange, whose business is tracking chip supply and demand, doesn't see a shortage. In its daily commentary yesterday, the exchange wrote: "In keeping with the end of the year theme, OEMs are in the market offering excess supply on DRAM and CPUs. Reducing inventory levels is common practice at each quarter end, but quantities are typically greater during the calendar year end." In other words, despite talk of a boom, this year is no different. What's more, Merrill Lynch's Tom Kurlak, who recently seemed to be softening his stance on Intel, yesterday told his clients that talk of a boom in chip sales is little more than "irrational exuberance." His key points: The seasonal PC pickup, as this column suggested last week, is being driven by retail sales of sub-$1,000 models; corporate PC demand is "not materially affected by the Year 2000 debacle"; and PCs are not enough to drive an overall industry recovery, because they account for only 36% of the market."

To: FJB who wrote (1687)	12/11/1998 1:10:00 PM
From: Artslaw	Read Replies (1) \| Respond to of 3813

Robert, I re-read the Intel paper, and you are correct--the gate length IS 0.13µ for NMOS and 0.15&micro for PMOS. It would appear that Intel is just grouping their technology under the generally accepted SIA Roadmap gate lengths (0.35, 0.25, 0.;18, 0.13, 0.1 -- each differs by the square root of 2), so this is their "0.18 technology." With regard to the length definitions: Essentially, the gate length is the physical length of the printed gate (sometimes it takes other factors into account). The poly-gate length (poly length), although sometimes considered synonymous with physical gate length, is more often defined to take the subdiffusion and/or tip regions into account. That is, the "poly length" is the length from the edge of the drain implant to the edge of the source implant. This is also the "first order" effective channel length. The effective channel length is the distance from the edge of the source depletion region to the edge of the drain depletion region, each of which extend from the boundary of the source and drain region into the channel (actually the depletion region extends ever so slightly into the source and drain as well, but that doesn't affect current, which is the whole reason we care about the effective channel length). The effective channel length used to be pretty much the same as the poly length, but now that the devices are so small, the depletion regions are a large fraction of the channel length. I don't know where Yousef got 0.08 as the effective channel length, but he could be right. The effective channel length is actually a function of the applied voltages. When a large voltage is applied to the drain (after the current 'saturates'), the depletion region increases and the channel shortens. The importance of the effective channel length is that the drain current provided by the transistor is inversely proportional to the effective channel length (and directly proportional to the effective width). Because of this, the effective channel length can actually be a number which does not really have any physical meaning, but rather "fits" the data. Hopefully this is useful. It's a lot easier to explain with a picture of a MOS transistor! Regards, Steve