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To: Dave Hanson who wrote (4123)	12/10/1998 11:14:00 PM
From: Sean W. Smith	Respond to of 14778

Now in theory, of course, there could be multiple-bit errors that this ECC circuitry couldn't correct. But it's save to say that with the reliability of modern memory, the chances are truly infinitesmal. And I bet the chances of a parity error occouring that BX couldn't at least <>detect is all but mathematically impossible True but it will detect them and halt the system indicating the source of the crash rather than a BSOD. The Chances of error in indeal test environments is very low. In the real world this seems to vary a lot and being able to diagnose this type of problem is very beneficial. Remember pairty will only detect one bit error. Get two bits swapped in a byte which certainly would be considered rare and you won't detect it. ECC will. A.J. Vandegoor in Testing Semiconductor Memories makes extensive use of probability and available reliability data on RAM's to show the importance of testing memories and how often these failurs can be expected. His biggest problem is lack of good reliability data. I would say his #'s are kinda of optimmistic and representative of a controlled environment for determining BER's from a small set of suppliers. He has no data from system houses. Very interesting stuff. May not seem very important but if you trying to build a million boxes a year and each box has 100 Million + Transistors in it and customers run them 24/7. Understanding and Implimentating formal test and analysis is necessary to control quality and be able to make money building products with the tremendous complexity we face today. Sean

To: Dave Hanson who wrote (4123)	12/11/1998 10:41:00 AM
From: Spots	Read Replies (1) \| Respond to of 14778

ECC and BX, ETC My question really was to the effect of enough bits. For some reason I had the impression that the parity modules (dimms or simms) had one parity bit per access unit, whatever that is (64 bits for dimms). Bigger than a byte, anyway. One is plenty to detect an error (1 bit error), and in fact I don't see any reason why there should be more. However, yes, if parity modules have 9 bits per byte, then there are plenty of bits for ECC, and the chipset can certainly carry it out.