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Technology Stocks : Xilinx (XLNX) -- Ignore unavailable to you. Want to Upgrade?

To: Lucinos who wrote (2152)	12/23/1998 9:22:00 PM
From: Bilow	Read Replies (2) \| Respond to of 3291

Hi Lucinos; About those NRE costs... It would be nice to understand exactly what each cost represents, then it would be easier to imagine scaling them into the future. For years it has been possible to get full custom chips done in "batch" mode, (where a number of different dies are all placed on a single wafer) at a much lower cost than what industry is used to paying for. This is how EE students are able to do a CMOS chip for their class projects, for instance. The problem is that you have to wait for the bus to fill up before it pulls away from the curb, and that increases the turn-around time. Were your costs high at least partly because you are using a close to state of the art process (i.e. 0.25u)? If you could have used an older technology, I would guess the NREs (and possibly the turn around time) would have been somewhat less. This is the case for the type of pad-limited designs that I would expect Xilinx to be able to defend against ASIC replacement. Another question: Did you prototype using Xilinx? I've had one Xilinx design replaced with an ASIC, (which did a lot more than the original ASIC), and another that got replaced with one of the hard-wired chips, though after I left that company. An interesting comment for you to make is to compare what kind of performance you are getting out of that 0.25u process compared to a Xilinx chip, as well as what the costs per chip are. In the mean time, could somebody please explain the following error message that I am getting? Xilinx Mapping Report File for Design "gentest" Copyright (c) 1995-1998 Xilinx, Inc. All rights reserved. Design Information ------------------ Command Line : map -p xcv200-4-bg352 -o map.ncd gentest.ngd gentest.pcf Target Device : xv200 Target Package : bg352 Target Speed : -4 Mapper Version : virtex -- M1.5.21 Mapped Date : Wed Dec 23 18:02:17 1998 Design Summary -------------- Number of errors : 1 Number of warnings : 2 Section 1 - Errors ------------------ FATAL_ERROR:baste:bastecomp.c:1906:1.86 - update_comp returned FALSE: U2/H13/U11/$I340. Process will terminate. Please call Xilinx support. -- Carl (edit) The above error was no doubt due to the following warning: WARNING:xvkma:31 - No 5 input support yet turkey! U2/H13/U11/$I340 The problem with being a pioneer is putting up with the occasional little problem.