To: Michael F. Donadio who wrote (6069 ) 1/6/1999 7:52:00 PM From: cksla Respond to of 8581
PSC 1000--- "most MIPS per milliwatt of any commercial processor" SOFIG There will be a meeting of the Southern Ontario Chapter of the Forth Interest Group: * * * * * P U B L I C W E L C O M E * * * * * Date: Saturday Jan 9, 1999 Time: 2:00 Open Discussion 3:00 Business Meeting 3:15 Presentation 5:00 Adjourn Location: Ryerson Polytechnic University Rogers Center, Room V205 Presentation: THE PSC1000 JAVA/FORTH MICROPROCESSOR Brad Rodriguez, Ph.D. The Patriot Scientific PSC1000 microprocessor is a novel 32-bit RISC processor optimized to execute stack-based languages, such as Java, Forth, Postscript, and even C and C++. The PSC1000 includes a dual-stack "ShBoom" processor optimized to execute stack-based languages, such as Java, Forth, Postscript, and even C and C++. The PSC1000 includes a dual-stack "ShBoom" microprocessor, an independent I/O processor, and a wealth of on-chip I/O. The processor achieves single-cycle execution and 100 MIPS peak performance with only 138,000 transistors, through a starkly simple CPU design -- without pipelines, parallel execution units, or other CPU accelerators. Intended for low-power, low-cost systems, its power consumption is only 165 milliwatts at 100 MHz, giving it perhaps the most "MIPS per milliwatt" of any commercial microprocessor. Brad Rodriguez has been working with the PSC1000 for several months, and will describe the basic architecture and instruction set of the CPU, with a brief mention of its use in embedded systems. This talk should be of interest to CPU designers, Java programmers, and Forth programmers. Advance information about the PSC1000 can be found at <http://www.ptsc.com/>