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Technology Stocks : LSI Corporation -- Ignore unavailable to you. Want to Upgrade?

To: Jock Hutchinson who wrote (16910)	2/8/1999 10:49:00 AM
From: DavidG	Read Replies (1) \| Respond to of 25814

Jock, I am not following you at all...but that's ok, as long as LSI goes up I am real happy.:-) Good Luck DavidG

To: Jock Hutchinson who wrote (16910)	2/8/1999 11:18:00 AM
From: Moonray	Respond to of 25814

Synopsys Teams With LSI Logic to Deploy Next-Generation ASIC Static Verification Tools; LSI Logic Includes PrimeTime and Formality Products in its FlexStream Design Solution MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Feb. 8, 1999--Synopsys Inc. (Nasdaq:SNPS), the technology leader for complex IC design, today announced LSI Logic Corporation's endorsement for the PrimeTime(R) product, Synopsys' industry leading, full-chip, static timing analysis (STA) sign-off tool, and support for the Formality(R) product, Synopsys' formal verification tool for gate-to-gate equivalence checking. Used together with simulation, static timing analysis and formal verification deliver exhaustive coverage of timing critical paths and functional equivalence for system-level designs at speeds that are orders of magnitude faster than traditional gate-level simulation alone. Synopsys is the only electronic design automation (EDA) company to offer a complete static verification solution to the market, combining static timing, formal verification and integrated synthesis -- enabling designers to meet their ever increasing verification challenges, time-to-market and time-to-volume pressures. "LSI Logic's FlexStream(TM) offers customers a complete methodology to meet today's system-on-a-chip (SoC) design challenges, including state-of-the-art tools such as Synopsys' PrimeTime timing analyzer," said Jeff Vanderlip, marketing manager for CAD and Methodology at LSI Logic. "We have worked very closely with the PrimeTime engineering team to provide the capabilities required for our G10, G11 and G12 technology libraries, and integration into our FlexStream(TM) Design Solution." Simultaneously, LSI Logic announced support for the Formality formal verification product. According to LSI Logic's Vanderlip, "formal verification will be a key part of our future design flows. Our customers will benefit from the speed, debugging capability and ease-of-use offered by Formality to accelerate the FlexStream design flow." LSI Logic intends to initially support the use of Formality for gate-to-gate equivalence checking. "PrimeTime's sign-off qualification is all the more significant because LSI Logic has long standardized on MOTIVE for static timing analysis," said Herb Reiter, director of the Silicon Vendor Program at Synopsys. "LSI Logic and Synopsys have worked very closely together to provide customized PrimeTime training to LSI's design center engineers worldwide in preparation for this announcement. "PrimeTime and Formality are gaining tremendous ASIC vendor support because of our commitment to quality tools and to the customer," said Antun Domic, vice president and general manager of Synopsys's Test and Static Verification business unit. "Aligning with companies like LSI Logic validates our belief that a combination of static timing sign-off and formal verification is the right methodology to support customer needs with system-on-a-chip design." Static Verification Meets the Million-Gate Design Challenge The verification bottleneck posed by the size and complexity of today's designs has forced the design community to consider alternatives to dynamic verification. In these situations, static verification tools such as PrimeTime and Formality offer the engineer numerous advantages over gate-level simulation. The PrimeTime product is a standalone, full-chip, gate-level static timing analysis (STA) and sign-off tool targeted for high-end, SoC multimillion-gate ASICs. Its libraries and delay calculation sub-system --including IEEE 1481-delay calculation language (DCL) and commands, are the same as those used with Synopsys' synthesis tools. These features enable unparalleled timing consistency throughout the design flow, ease-of-use and low-cost of adoption. PrimeTime also offers many unique STA features including complex handling of clocking schemes, advanced Stamp modeling capabilities for embedded cores, detailed parasitic back annotation for deep sub-micron accuracy and ultra-fast timing analysis. In addition, PrimeTime includes integrated design budgeting, Synopsys' design constraint (SDC) generation and advanced visualization techniques for quick debugging of complex timing problems and timing closure. The Formality product is a formal verification tool used to perform full-chip equivalence checking. Formality easily integrates into existing design flows and allows users to compare different implementation at both gate and RTL levels. Unique Formality technology employs a number of "solver" algorithms to quickly prove the functional equivalence of two versions of a design without the need for test vectors. The Formality product also provides powerful analysis and debug capabilities that allow designers to analyze implementation differences. As a result, a functional design flow utilizing the full static verification solution takes full advantage of the strengths of formal verification and static timing analysis, provides better timing closure, accelerates the design implementation/verification stage and gives the designer a much higher level of confidence in the accuracy of their design. About Synopsys Inc. Synopsys (Nasdaq:SNPS), is a leading supplier of electronic design automation (EDA) solutions to the global electronic market. The company provides comprehensive design technologies to creators of advanced integrated circuits, electronic systems and systems-on-a-chip. Synopsys also provides consulting services and support to its customers, allowing them to streamline the overall design process and accelerate time-to-market. Additional information about Synopsys is available at synopsys.com. Synopsys, PrimeTime and Formality are registered trademarks and MOTIVE is a trademark of Synopsys Inc. FlexStream is a trademark of LSI Logic. All other trademarks or registered trademarks are the property of their respective owners. --30--sg/bos* CONTACT: Synopsys Inc. Lisa Bullard, (650) 694-4401 bullard@synopsys.com or The Hoffman Agency Ellie Katsoudas, (408) 975-3057 ekatsoudas@hoffman.com o~~~ O