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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Tenchusatsu who wrote (49218)	2/10/1999 5:20:00 PM
From: Scumbria	Respond to of 1583384

Ten, I believe each module already starts with 20 banks. Second, adding modules also add to the number of banks. What is the page size of a DRDRAM bank? The page hit rate is largely a function of the number of addresses which are "open", similar in concept to the number of addresses "resident" in a cache. In an SDRAM system, it is unusual to have more than 8KB of "hittable addresses" at a time. This leads to very low page hit rates, particularly when sitting behind a large L2. An L3 needs to have about 2MB of hittable addresses to be of much value. A lot of open pages can be a liability, if the page hit rate is low. The additional precharge time can more than cancel the gains made from page hits. Scumbria

To: Tenchusatsu who wrote (49218)	2/10/1999 7:08:00 PM
From: Scumbria	Read Replies (1) \| Respond to of 1583384

Ten, I read the DRDRAM 64/72 Mbit spec, and it contains the following info. You can keep 16 rows open at a time, and each row is 1K- providing a total of 16K hittable addresses. Compared to a 2MB L3, it is safe to expect the hit rates to be much lower. For many apps, you would be better off precharging after each access. A lot of people thought that SDRAM would provide a big performance boost over EDO because of the ability to keep pages open, but they were sorely disappointed by reality. rambus.com Scumbria