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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Tenchusatsu who wrote (49230)	2/11/1999 1:05:00 AM
From: Scumbria	Respond to of 1583331

Ten, If you have several transactions outstanding, you can precharge different banks concurrently, provided that each transaction hits a different bank. Very good point. It will be interesting to see how it pans out in real systems. Scumbria

To: Tenchusatsu who wrote (49230)	2/13/1999 10:23:00 AM
From: Scumbria	Read Replies (1) \| Respond to of 1583331

Ten, If you have several transactions outstanding, you can precharge different banks concurrently I thought about this some more. The concept you present is valid, and is used in sophisticated SDRAM and RDRAM memory controllers. However, RDRAM offers no advantage in this regard relative to SDRAM. The PII/PIII core can only support 2 or 3 outstanding load misses (due to the number of execution units). SDRAM provides enough banks to fully support precharging and opening the second and third banks, while servicing the first. Therefore, the additional banks on RDRAM are of no benefit. If the core could support 9 or more outstanding load misses, your argument would work. In summary, The page hit rate and precharge ahead features of the two DRAM types are identical. I don't expect to see any advantage of a DRDRAM system over a K7 SDRAM system. Scumbria