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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Monica Detwiler who wrote (50924)	2/25/1999 11:28:00 PM
From: RDM	Read Replies (1) \| Respond to of 1571464

You make two excellent points. <What do you call the K6-III in which AMD actually had to make a major INCREASE in the voltage in order for it to reach a speed 100 MHz LOWER than Intel's P3? No advance - of course!> If you are saying that change in process were utilized to get the 500 Mhz performance. Just the voltage was not changed. Then I would stand corrected that there is a process advance in the Pentium III. Since the chip is described as a new core it is also possible that speed paths were optimized and not the process. Do you have any reason for believing the process was improved? You are correct that the 1101 was a 256 bit static ram. The 1102 was actually what I meant to say. inventors.miningco.com Intel learned several lessons from the i1102, namely: 1. DRAM cells needed substrate bias. This spawned the 18 pin DIP package. 2. The "butting" contact was a tough technological problem to solve, and yields were low. 3. The "IVG" multi-level cell strobe signal made necessary by the "1X, 2Y" cell circuitry caused the devices to have very small operating margins. So though they continued to develop the i1102, there was definitely a need to look at other cell techniques. Ted Hoff had proposed all possible ways of wiring up 3 transistors in a DRAM cell earlier, and at this time somebody took a closer look at the "2X, 2Y" cell, I think it may have been Karp and/or Leslie Vadasz. (I hadn't come to Intel yet) The idea of using a "buried contact" was applied (probably by Tom Rowe, process guru), and this cell became more and more attractive, since it could potentially do away with both the butting contact issue AND the aforementioned multi-level signal requirement, AND yield a smaller cell to boot! So Vadasz and Karp sketched out a schematic of an i1102 alternative (on the sly, since this wasn't exactly a popular decision with Honeywell), and assigned the job of designing the chip to Bob Abbott, sometime before I came on the scene in June 1970. He initiated the design, and had it laid out. I took over the project after initial "200X" masks had been shot from the original mylar layouts, and it was my job to evolve the product from there, which was no small task in itself. Well, it's hard to make a long story short here, but the first silicon chips of the i1103 were practically non-functional, until it was discovered that the overlap between the "PRECH" clock and the "CENABLE" clock, the famous "Tov" parameter, was VERY critical, due to our lack of understanding of internal cell dynamics. This was a discovery made by test engineer George Staudacher, by the way. Nevertheless, understanding this weakness, I characterized the devices on hand and we drew up a data sheet. Because of the low yields we were seeing primarily due to the "Tov" problem, Vadasz and I recommended to Intel management that the product wasn't ready for market, but Bob Graham, then Intel Marketing V.P., thought otherwise, and pushed for an early introduction, over our dead bodies, so to speak. The Intel i1103 "came to market" in October of 1970.