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To: Scumbria who wrote (74956)3/1/1999 1:00:00 PM
From: Tony Viola  Read Replies (2) | Respond to of 186894
 
S, >>>Nobody knows how to write a compiler which can take advantage of IA-64's
theoretical processing power.<<<

Well then what are IBM, SGI and all the rest screwing around with it for?

TV



To: Scumbria who wrote (74956)3/1/1999 1:14:00 PM
From: L. Adam Latham  Read Replies (1) | Respond to of 186894
 
Scumbria:

Re: It is much simpler to write software which partitions the compute tasks at the granularity of the CPU. Attempting to multi-thread a single instruction stream for the APIC architecture, is a ridiculously complex problem.

I disagree. I think you're underestimating the advances that have been made in compiler technology. In addition, there are libraries available now (some for free) that have highly tuned, multithreaded routines that just have to be linked into your application. Writing "software which partitions the compute tasks at the granularity of the CPU" is still quite tedious, and is certainly no simpler than writing multithreaded code, IMO.

Adam



To: Scumbria who wrote (74956)3/1/1999 2:39:00 PM
From: Tenchusatsu  Read Replies (1) | Respond to of 186894
 
<Nobody knows how to write a compiler which can take advantage of IA-64's theoretical processing power.>

You sure? I believe there is a lot of communication between compiler writers and Merced-land.

<It is much simpler to write software which partitions the compute tasks at the granularity of the CPU. Attempting to multi-thread a single instruction stream for the APIC architecture, is a ridiculously complex problem.>

Just as ridiculously complex as trying to squeeze out more ILP using a traditional out-of-order RISC-like architecture?

Remember, it's always better to have one processor working twice as fast than to have two processors working at normal speed.

Tenchusatsu