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Technology Stocks : LSI Corporation -- Ignore unavailable to you. Want to Upgrade?

To: patrick tang who wrote (17376)	3/15/1999 7:07:00 AM
From: Jock Hutchinson	Respond to of 25814

LSI tweaks CMOS process for IF CMP Media Inc Mar 12, 2:08 am Related LSI 25 15/16 -1/4 Mar. 12, 1999 (Electronic Engineering Times - CMP via COMTEX) -- Munich - In a bid to extend its reach into mixed-signal applications, LSI Logic Corp. (Milpitas, Calif.) has disclosed that it is making additions to its CMOS 0.18-micron G12 process technology. The company announced its plans here last week during the Design Automation and Test Europe (Date-99) conference and exhibition. The process, which is a single-polysilicon CMOS technology, is currently being used for design but is not yet in production. The company said the new process will allow it to integrate certain intermediate-frequency (IF) circuits within future baseband communications processors for mobile communications and digital television applications. Iain Jackson, LSI's director of marketing for Europe, said the company believes its G12 process could also be used at around 2 GHz for communications modulation frequencies. "The n-channel transistor has a transition frequency of 60 GHz, so there is the possibility of doing RF work, although this remains a research subject at the moment," he said. The process, drawn at 0.18 microns but with an effective channel length of 0.13 microns, supports mixed-signal circuits at supply voltages ranging from 1.8 V and 2.5 V up to 3.3 V, with 5-V-tolerant I/O cells. Commercial designs based on the G12 process are due to begin shipping in the fourth quarter of 1999. Fast transistor LSI has now deployed a process module that provides an additional fast analog transistor operating at 3.3 V. It has a low threshold voltage that allows for a voltage swing of 3.3 V for analog signals. The company is also offering a low-threshold-voltage, 1.8-V n-channel transistor for analog circuits. Jackson said the 3.3-V voltage swing analog transistor is being used to implement a 12-bit 50-Msample/s analog-to-digital converter for IF conversion within satellite and digital television receiver chip sets. It is set to be used to integrate IF mixers and variable-gain amplifiers within his company's GSM and CMDA baseband processors, he said. At the same time, LSI has made several improvements in G12's digital capabilities. By redesigning logic-cell layouts, the company has been able to improve their routing efficiency, claiming it can now achieve 95,000 logic gates per square millimeter with a routing efficiency of 85 percent to 90 percent . "It's a result of real-world calibration and redesigning cells to optimally use G12," Jackson explained. Similarly, Jackson said, the memory efficiency of G12 has been increased by a six-transistor SRAM cell that allows 130-kbits/mm2, a 20 percent improvement over the original version. Jackson noted that all analog blocks are proven first in silicon and then integrated as a single mixed-signal block for integration within a mixed-signal ASIC on a project-by-project basis. The company uses analog cores for its G12 process that are developed internally as well as by third parties. By using the new process, Jackson said, the company can extend the same right-the-first-time capability of digital ASICs to mixed-signal system-level chips.