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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: d e conway who wrote (54847)	4/8/1999 3:37:00 PM
From: Mani1	Read Replies (1) \| Respond to of 1573123

It seems like K6 III 450 is starting to roll out. It is now available (in stock)at several venders from price watch. It is also advertised as "in stock" in a local computer magazine with several computers for sale based on it. At over $400/piece, it should be a clear boost to the ASP's. About 5.6 million chip at the ASP of $85 should put AMD back in black in the second quarter. Optimistic yes, but it is possible. Mani

To: d e conway who wrote (54847)	4/8/1999 4:24:00 PM
From: Tenchusatsu	Read Replies (1) \| Respond to of 1573123

Dan, your mind is much more closed than you think. Let me address all your points. <K7 -- as demoed at CeBit, starts life out at 600mhz (@.25u). PIII-- appears to top out at 550mhz (@.25u).> Dan, do we know that the K7 is starting its life at 600 MHz? The unconfirmed reports from www.sharkyextreme.com say that K7 samples are running at 500 MHz. And do we know whether that 600 MHz chip is a hand-picked chip, or an actual production version? Was that 600 MHz chip specially cooled, or does it have a regular heat sink and fan? <K7 -- 9 issue super-pipeline (speed optimized) design PIII-- 5 issue pipeline.> To make a long story short, the K7 can still only decode three x86 instructions at a time, just like the Pentium III. It's extremely rare that you'll get all nine execution units running at once. Heck, even the Pentium III can rarely get all of its execution units running at once, which kind of tells you that more isn't necessarily better. (By the way, the six integer units on the K7 are actually three groups of two units. The K7 executes on macro-ops, which are two integer operations folded into one.) <K7 -- Pipelined FPU estimated at ~1 GFLOP (@500mhz) PIII-- estimated ~.5 GFLOP (@500mhz).> Yes, this is the only area where the K7 can potentially shine, because going from one floating-point pipeline to two WILL help. (Going from four to six integer units isn't going to help as much as going from one to two floating-point units.) Oh, and by the way, did you know that the Pentium III can achieve an estimated 2.0 GFLOPs at 500 MHz when using SSE? Yeah, I know, this is just a marketing point, but so are all your other K7 points below: <K7 -- uo to 8mb L2 capability PIII-- up to 2mb> Wrong. No one knows what the Pentium III's L2 cache size limit is. AMD is only mentioning the 8 MB maximum size as a marketing stunt. In practice, the K7 will probably never reach even 4 MB of L2 cache. 2 MB is a distant possibility, but that depends on whether AMD really wants to make a serious push into servers. <K7 -- no privacy encroachment with cpu I.D. PIII-- yes cpu I.D.> Another marketing thing. If AMD is resorting to conjuring Big Brother Doomsday scenarios to scare people away from Intel, they've already lost. <K7 Point-to-point will provide awesome multiprocessor capability. K7 EV6 bus design may be able to go to 400mhz.> Another marketing stunt. Listen to your own words, "may be able to go to 400 MHz." The rumor is that even an initial bus speed of 200 MHz is doubtful at the moment. Oh, and by the way, the point-to-point bus itself isn't a huge advantage. Multiprocessor buses will stay with us for quite a while. I personally feel that the point-to-point bus is useless unless it reduces the pin count or allows for the memory controller to be integrated onto the CPU itself. Neither is the case with the K7. <On paper, there is no contest here.> "My foils are better than your foils." - Elmer Tenchusatsu