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To: Scumbria who wrote (78160)	4/9/1999 12:53:00 AM
From: Paul Engel	Read Replies (1) \| Respond to of 186894

SCUM bria - Re: "In a VLIW processor, the instructions not only have to be in order," Of course they have to be in order - ON ANY MACHINE - or a different result is generated - ON ANY MACHINE -- unless you have a CPU that can read a programmer's MIND and INTENTIONS instead of his programming instructions . Re: "but they also need to go into the correct "slot" to guarantee correct execution." What the heck are you calling a "slot" ? Paul

To: Scumbria who wrote (78160)	4/9/1999 1:26:00 AM
From: Gerald Walls	Read Replies (1) \| Respond to of 186894

mov a, b add a, c mov b, a These instructions would execute b = c + b In a VLIW processor, the instructions not only have to be in order, but they also need to go into the correct "slot" to guarantee correct execution. It may be necessary to add no-ops to this code to make it execute properly on an IA64 CPU. And this differs from the delay slots in the AMD-29050 (for which I written a little assembly) or just about any other RISC chip in what way?