Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: DRBES who wrote (55802)	4/17/1999 9:15:00 PM
From: Kashish King	Read Replies (2) \| Respond to of 1578633

Imagine the bandwidth that could be saved by initiating a policy wherein those law firms not planning on suing AMD for stock fraud would simply issue a press release with that statement. That would be so much more efficient than the current model.

To: DRBES who wrote (55802)	4/18/1999 12:36:00 PM
From: Steve Porter	Read Replies (2) \| Respond to of 1578633

ALl, A tidbit about the K& configuration on that univeristy web site. Not only are the benchmarks mde up, but the numbers are all wrong (I was point to this by a friend of mine). ftp://ftp.stanford.edu/class/ee382/dp2/k7.mxs COnfiguration file... contains (read this carefully): # L1 Cache Size (kBytes) # PC_LATENCY 1 PC_LATENCY 64 # L1 Hit Latency (cycles) # PC_CACHE_SIZE 1 PC_CACHE_SIZE 3 A 3K 64 cycle L1 cache.. yeah that's good for performance! Coppermine is screwed too.. 1K 16cycle latency L1... that right there would explain the performance numbers.. anyway. Regards, Steve