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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: DRBES who wrote (55814)	4/18/1999 1:03:00 PM
From: Steve Porter	Respond to of 1578640

Darbes: It is entire hypothetical.. just pointing to one example where the numbers used are clearly NOT real world numbers. Regards, Steve

To: DRBES who wrote (55814)	4/18/1999 1:10:00 PM
From: Scumbria	Read Replies (1) \| Respond to of 1578640

DARBES, The problem with a trace simulator (as opposed to a cycle-accurate simulator) is that it does not take into account the real-time interactions in the pipeline. A good example of this is the pipelined three cycle L1 latency on K7. Without knowing the exact timing of the next cache access, it is impossible to determine the performance impact of the extra cycle latency. It is very unlikely that any cycle accurate K7 architectural simulators exist outside of AMD ;^) Scumbria