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To: Sylvia Dupuis who wrote (2028)4/29/1999 2:54:00 PM
From: schlep  Read Replies (1) | Respond to of 2389
 
Look at all major players mcell revenue growth over last 18 months. Essentially flat! I still stand by my opinion that Lattice and Vantis will have significant pains growing revenue even with larger Mcell devices. While there are some functions that need mcells as opposed to the fpga LUTs to obtain the speed, you overlook the new competition of the larger Apex FPGAs. APEX includes fast io timing, LUTs, AND MCELLS providing the ability to integrate this 'class' of functions into a solution with reduce chip counts canabilizing much of the mcell business along the way.

schlep



To: Sylvia Dupuis who wrote (2028)4/29/1999 5:58:00 PM
From: Lewis M. Carroll  Read Replies (1) | Respond to of 2389
 
Sylvia, your comment on big CPLDs has a basic problem. At the heart of a CPLD is a somewhat less than 100% populated crosspoint switch. Different people have different ways of implementing the switch but it is still a switch. It's nature is that it grows exponentially in complexity with the number of inputs. This means it sucks up die area and power. Macrocell-based products above about 200 macrocells are inefficient power-hungry expensive beasts. You can match performance for most applications at that level with a 6KA or SpartanXL device. People still use them though because they are afraid of FPGAs or think they need instant-on.

What kind of performance exactly do you think a 30K gate CPLD (which translates to about 1000 macrocells) can provide that is unheard of in FPGAs? Last I checked, Virtex could do damn near 200 MHz. Show me a CPLD that comes close at that density and doesn't consume KW of power.