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Technology Stocks : LSI Corporation -- Ignore unavailable to you. Want to Upgrade?

To: Jock Hutchinson who wrote (18384)	5/9/1999 2:52:00 PM
From: patrick tang	Read Replies (1) \| Respond to of 25814

Good morning Jock, & Happy Mother's Day to all too. I think we are in for a ride from here. A few comments, most strictly IMHO, nothing factual to back 'em up: 1. CDMA - yes great news, they are going to be in-the-party. 2. Cu - a lot of the process modules nowadays are bought off the shelf from the equipment manufacturers. The integration into the final process, however, in trickier since it affects the device modeling and thus the final exact transistor sizes & layouts. My guess is it is tough for the first guy, but much much easier for the 5th or 10th guy when the equipment guys have it completely down. Intel's processing is every bit as good as IBM's. What's good enough for Intel is good enough for LSI for me <G>. Yes IBM is ahead of them, but nobody else is into Cu yet, e.g. TXN, MOT, LU, ADI, TSMC, UMC etc. Have not heard of NEC or Toshiba into Cu either. 3. R&D expanse - just got to trust management on this one. Besides, symbios probably is not as R&D intensive. The semi Symbios part gets the benefit of LSI's semi R&D while the storage Symbios part probably is not as R&D intensive as semi. Remember another statistic too - the total ships per design is higher and growing higher now. This also cuts down on R&D expanse relatively to sales (assuming some of the design work gets billed towards R&D). 4. FPGA. I separate this competition into 2 groups, new vs existing designs. For new designs, I look at the thing like a piramid, SOC/customs on top at the tip while FPGA below it. And the piramid is always growing and reaching up. Yes, maybe some newer designs in the old top of the line desities are being done in FPGA now because the FPGA desnities are getting larger. But the SOC/ASIC guys have not been standing still. LSIs of the world are also increasing their densities as well and thus capture the newer top of the line designs that were not possible with the older SOC/ASIC generation. Since SOC/ASIC can always offer larger densities than FPGA, SOC/customs will always be around. The tip of the piramid will never be FPGA. After that, we get into production of existing designs. ASICs will always be packed tigher than FPGAs. As such, at least in the beginning, people will just go with ASICs for the design in phase. Of course when it comes to shrinking the die for designs with very long life times, my guess is 50/50 for people to shrink in ASIC vs people who want to go with newer FPGA. Are there that many designs around that will shrink the die over the life of the product? My guess is not, especially looking at how long the life of that LSI Japan fab is. 11 years and they still have to extend the shut down by another Q+ for last time buys. For non-commodity chips where value is in the IP, chip prices do not matter that much because they are a much smaller part of the cost. 5. Mint Technology. I never saw that as a stand alone business itself as much as a hook for the fab. As a stand alone business, it does not have any advantage over other people. It's advantage in design comes in thorough knowledge of the characteristics of the LSI process and hopefully quicker feedbacks from the fab. For the same reason, this may also be its dis-advantage as well. If I were TSMC, I may not want to cooperate with them as readily. 6. Fabless vs fab-yes. I think both will coexist. There will always be guys who wants to sell pure digital stuff of which the IP does not lie much with the processing or process-design integration. Chip sets and S3s of the world comes to mind. For these guys, foundries are great. For other people like system houses who just want to use the chips and won't sell their great designs to their system competitors, as long as there are LSIs around, they would be happy to use them. For trickier designs like CDMA, LSI's of the world are just what's needed, e.g. look at how many people tried CDMA and did not make it. 6. One last thing not mentioned, just my own thoughts. The semi guys just cut 0.15um from their road map. I think the 0.18um is going to be around a little longer that other generations. If nothing else, people need to make back the money that they have lost first. This bodes well for LSI who already have everything in place for 0.18um. Bodes well for my own plan too. I think 0.12um will get overbuild. The longer it takes for 0.12um to come into play, the more time LSI stock will have to run up before I sell prior to 0.12um ramps. patrick

To: Jock Hutchinson who wrote (18384)	5/9/1999 4:24:00 PM
From: Tony Viola	Read Replies (1) \| Respond to of 25814

Jock, Patrick, Wolf, Akmike, Eric, Thanks for the compliments, and you're welcome. My pleasure sharing the notes. I guess I learned something else in college besides EE, i.e., taking notes in a dark room on small pieces of paper. Actually, I lied, it wasn't dark, first stockholders meeting I ever attended that wasn't. One other cute question was from a lady, who first said thanks to Wilf for all the info, but why couldn't the meeting be held where LSI's HQ was, since she also lives in Milpitas, CA. Wilf said they like to move it around...last year NYC, where there is a large mass of financial people. Next year will be Colorado, because of Symbios' chip div. being there, I guess. Well, I won't make that one. Colorado LSI investors, start your engines. Re your concern for copper, I agree with Patrick's answer, although Motorola is the other major that supposedly has it now. They demoed, I believe, a 600 MHz SRAM recently, copper connected. Intel said you don't really gain that much advantage until 0.13, especially if you can pump the transistor performance one more time via low K. Intel did this and so did LSI. Wilf said LSI would be there in copper, just later. Just remembered, Wilf said that IBM had made a big splash about copper, which I interpreted as him saying there might be more publicity in copper than performance. We'll be able to track it (CU vs. AL) by watching Intel's MHz roadmap continue to roll out, which I personally have no plans in finding disappointing. The don't quote me on this one referred to the point about LSI may be reducing fab size in Japan. I was writing, didn't quite catch it. Gresham is definitely at 8" wafers, and, yes, LSI would be happy at 9th or 11th on 12", just don't want to bear the expense of being first. Intel feels the same because Barrett was in charge of MFG at Intel when they did go first, at 6", I think. Apparently, it was a big, big hassle. Again, LSI will get to 12", but not first. About the cuts in R&D, I thought LSI was extremely high in R&D, expressed as a % of revenues before (about 20% ?). It was almost double Intel's. Not knowing anything else about it, just seems they could afford to take it down. On PLD's, PGA's, etc. competing with ASICs, I don't know. It seems like a whole lot of majors are staying with ASICs...IBM, TI, Toshiba. Must be something there. Fab-yes. Is it too late for you to represent me in patenting this? If not, wouldn't be the first time a naive old engineer lost out on capitalizing on a new idea. Oh well. Tony