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To: Steve Porter who wrote (32325)5/16/1999 12:30:00 AM
From: Scumbria  Read Replies (3) | Respond to of 33344
 
Steve,

There should be no need to tape somethign out more than once with today's verification tools.

Despite the tremendous hype from EDA vendors, logic verification of a complicated design is far from automated. In fact 99% of the tools shown at DAC are useless for CPU verification.

It is pretty standard for a successful design to go through a dozen or more tapeouts during it's life cycle.

Scumbria


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